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ADS5423IPJYR Datasheet(PDF) 4 Page - Texas Instruments |
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ADS5423IPJYR Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 28 page  ADS5423 SLWS160A − FEBRUARY 2005 − REVIISED JANUARY 2010 www.ti.com 4 ELECTRICAL CHARACTERISTICS Over full temperature range (TMIN = −40°C to TMAX = 85°C), sampling rate = 80 MSPS, 50% clock duty cycle, AVDD = 5 V, DRVDD = 3.3 V, −1 dBFS differential input, and 3 VPP differential sinusoidal clock, unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fIN = 10 MHz 74.6 fIN = 30 MHz 72.8 74.2 fIN = 50 MHz 74.1 Signal-to-noise + distortion, SINAD fIN = 70 MHz 73.9 dBc Signal-to-noise + distortion, SINAD fIN = 100 MHz 72.7 dBc fIN = 170 MHz 69.1 fIN = 230 MHz 62.8 fIN = 10 MHz 105 fIN = 30 MHz 100 fIN = 50 MHz 99 Second harmonic, HD2 fIN = 70 MHz 92 dBc Second harmonic, HD2 fIN = 100 MHz 90 dBc fIN = 170 MHz 94 fIN = 230 MHz 88 fIN = 10 MHz 94 fIN = 30 MHz 93 fIN = 50 MHz 94 Third harmonic, HD3 fIN = 70 MHz 90 dBc Third harmonic, HD3 fIN = 100 MHz 86 dBc fIN = 170 MHz 73 fIN = 230 MHz 64 fIN = 10 MHz 94 fIN = 30 MHz 95 fIN = 50 MHz 95 Worst-harmonic / spur (other than HD2 and fIN = 70 MHz 90 dBc HD3) fIN = 100 MHz 88 dBc fIN = 170 MHz 88 fIN = 230 MHz 88 RMS idle channel noise Input pins tied together 0.9 LSB DIGITAL CHARACTERISTICS Over full temperature range (TMIN = −40°C to TMAX = 85°C), AVDD = 5 V, DRVDD = 3.3 V, unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Digital Outputs Low-level output voltage CLOAD = 10 pF(1) 0.1 0.6 V High-level output voltage CLOAD = 10 pF(1) 2.6 3.2 V Output capacitance 3 pF DMID DRVDD/2 V (1) Equivalent capacitance to ground of (load + parasitics of transmission lines). |
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