ADS7800

8

SBAS001A

www.ti.com

FIGURE 6. Convert Mode: R/C Pulse LOW — Outputs Enabled After Conversion.

INTERNAL CLOCK

The ADS7800 has an internal clock that is factory trimmed

to achieve a typical conversion time of 2.47

µs, and a

maximum conversion time over the full operating tempera-

ture range of 2.7

µs. No external adjustments are required,

and with the guaranteed maximum acquisition time of

300ns, throughput performance is assured with convert

pulses as close as 3

µs.

READING DATA

After conversion is initiated, the output buffers remain in a

Hi-Z state until the following three logic conditions are

simultaneously met: R/C is HIGH, BUSY is HIGH and CS

is LOW. Upon satisfaction of these conditions, the data lines

are enabled according to the state of HBE. See Figure 9 and

Table III for timing relationships and specifications.

CALIBRATION

OPTIONAL EXTERNAL GAIN AND OFFSET TRIM

Offset and full-scale errors may be trimmed to zero using

external offset and full-scale trim potentiometers connected

to the ADS7800 as shown in Figures 10 and 11.

If adjustment of offset and full scale is not required,

connections as shown in Figures 4 and 5 should be used.

CALIBRATION PROCEDURE

First, trim offset, by applying at the input (pin 1 or 2) the

mid-point transition voltage (–2.44mV for the

±10V range,

–1.22mV for the

±5V range.) With the ADS7800 converting

pin 5) is toggling alternately HIGH and LOW.

Next adjust full scale, by applying at the input a DC input

signal that is 3/2LSB below the nominal full scale voltage

(+9.9927V for the

±10V range, +4.9963V for the ±5V

range.) With the ADS7800 converting continually, adjust

with all of the other bits HIGH.

LAYOUT CONSIDERATIONS

Because of the high resolution and linearity of the ADS7800,

system design problems such as ground path resistance and

contact resistance become very important.

ANALOG SIGNAL SOURCE IMPEDANCE

The input resistance of the ADS7800 is 6.3k

Ω or 4.2kΩ (for

the

±10V and ±5V ranges respectively.) To avoid introduc-

ing distortion, the source resistance must be very low, or

constant with signal level. The output impedance provided

by most op amps is ideal.

on the ADS7800, to maximize accuracy on the chip. They

should be connected together as close as possible to the unit.

R/C

Converter

Mode

BUSY

Data

BUS

Acquire

Convert

Acquire

Convert

Data Valid

Hi-Z State

Data Valid

Hi-Z State

1

2

ADS7800

±5V

Input

FIGURE 4.

±10V Range Without Trims.

1

2

ADS7800

±10V

Input

FIGURE 5.

±5V Range Without Trims.