ADC08D1000QML datasheet(11/50 Pages) TI1

Part #	ADC08D1000QML

Description	High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter

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Manufacturer	TI1 [Texas Instruments]

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I / O

GND

V

A

TO INTERNAL

CIRCUITRY

ADC08D1000QML, ADC08D1000QML-SP

ADC08D1000WG-QV

www.ti.com

SNAS352G – JANUARY 2007 – REVISED MARCH 2013

ADC08D1000 Converter Electrical Characteristics AC Parameters

The following specifications apply after calibration for VA = VDR = +1.9VDC, OutV = 1.9V, VIN FSR (a.c. coupled) = differential

870mVP-P, CL = 10 pF, Differential, a.c. coupled Sinewave Input Clock, fCLK = 1 GHz at 0.5VP-P with 50% duty cycle, VBG =

Floating, Non-Extended Control Mode, SDR Mode, REXT = 3300Ω ±0.1%, Analog Signal Source Impedance = 100Ω

Differential. Boldface limits apply for TA = TMIN to TMAX

(1) (2)

Sub -

Parameter

Test Conditions

Notes

Typ(3)

Min

Max

Units

groups

NORMAL MODE (Non DES) DYNAMIC CONVERTER CHARACTERISTICS

fIN = 100 MHz, VIN = FSR − 0.5 dB

7.5

Bits

ENOB

Effective Number of Bits

fIN = 248 MHz, VIN = FSR − 0.5 dB

7.4

7.0

Bits

4, 5, 6

fIN = 498 MHz, VIN = FSR − 0.5 dB

7.4

7.0

Bits

4, 5, 6

fIN = 100 MHz, VIN = FSR − 0.5 dB

47

dB

Signal-to-Noise Plus

SINAD

fIN = 248 MHz, VIN = FSR − 0.5 dB

46.3

43.9

dB

4, 5, 6

Distortion Ratio

fIN = 498 MHz, VIN = FSR − 0.5 dB

46.3

43.9

dB

4, 5, 6

fIN = 100 MHz, VIN = FSR − 0.5 dB

48

dB

SNR

Signal-to-Noise Ratio

fIN = 248 MHz, VIN = FSR − 0.5 dB

47.1

44

dB

4, 5, 6

fIN = 498 MHz, VIN = FSR − 0.5 dB

47.1

44

dB

4, 5, 6

fIN = 100 MHz, VIN = FSR − 0.5 dB

-55

dB

−47.

fIN = 248 MHz, VIN = FSR − 0.5 dB

-55

dB

4, 5, 6

THD

Total Harmonic Distortion

5

−47.

fIN = 498 MHz, VIN = FSR − 0.5 dB

-55

dB

4, 5, 6

5

fIN = 248 MHz, VIN = FSR − 0.5 dB

57

dB

Spurious Free Dynamic

SFDR

Range

fIN = 498 MHz, VIN = FSR − 0.5 dB

57

47

dB

4, 5, 6

fCLK1

Maximum Input Clock

Normal Mode (non DES)

1.2

1.0

GHz

4, 5, 6

Frequency

INTERLEAVE MODE (DES Pin 127=Float) - DYNAMIC CONVERTER CHARACTERISTICS

fIN = 248 MHz, VIN = FSR − 0.5 dB

7.3

Bits

ENOB

Effective Number of Bits

fIN = 498 MHz, VIN = FSR − 0.5 dB

7.3

6.8

Bits

4, 5, 6

fIN = 248 MHz, VIN = FSR − 0.5 dB

46

dB

Signal to Noise Plus

SINAD

Distortion Ratio

fIN = 498 MHz, VIN = FSR − 0.5 dB

46

42.5

dB

4, 5, 6

fIN = 248 MHz, VIN = FSR − 0.5 dB

46.4

dB

SNR

Signal to Noise Ratio

fIN = 498 MHz, VIN = FSR − 0.5 dB

46.4

43

dB

4, 5, 6

fIN = 248 MHz, VIN = FSR − 0.5 dB

-58

dB

THD

Total Harmonic Distortion

fIN = 498 MHz, VIN = FSR − 0.5 dB

-58

−49

dB

4, 5, 6

fIN = 248 MHz, VIN = FSR − 0.5 dB

57

dB

Spurious Free Dynamic

SFDR

Range

fIN = 498 MHz, VIN = FSR − 0.5 dB

57

47

dB

4, 5, 6

(1)

The analog inputs are protected as shown below. Input voltage magnitudes beyond the Absolute Maximum Ratings may damage this

device.

(2)

To ensure accuracy, it is required that VA and VDR be well bypassed. Each supply pin must be decoupled with separate bypass

capacitors. Additionally, achieving rated performance requires that the bottom be well grounded.

(3)

Typical figures are at TA = 25°C, and represent most likely parametric norms.

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