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ADS1196CZXGT Datasheet(PDF) 9 Page - Texas Instruments |
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ADS1196CZXGT Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 76 page  ADS1194, ADS1196 ADS1198 www.ti.com SBAS471C – APRIL 2010 – REVISED NOVEMBER 2011 BGA PIN ASSIGNMENTS (continued) NAME TERMINAL FUNCTION DESCRIPTION RLDIN 3A Analog input Right leg drive input to MUX. If unused, short to AVDD. RLDOUT 3B Analog output Right leg drive output RLDINV 3C Analog input/output Right leg drive inverting input WCT 3D Analog output Wilson Center Terminal output Internal test signal/single-ended buffer output based on register settings. If TESTP_PACE_OUT1 3E Analog input/buffer output unused, short to AVDD. Internal test signal/single-ended buffer output based on register settings. If TESTN_PACE_OUT2 3F Analog input/output unused, short to AVDD. VCAP4 3G Analog output Analog bypass capacitor VREFP 3H Analog input/output Positive reference voltage AVDD 4A Supply Analog supply AVDD 4B Supply Analog supply RLDREF 4C Analog input Right leg drive noninverting input AVSS 4D Supply Analog ground RESV1 4E Digital input Reserved for future use; must tie to logic low (DGND) RESV2 4F Analog output Reserved for future use; leave floating RESV3 4G Analog output Reserved for future use; leave floating VREFN 4H Analog input Negative reference voltage AVSS 5A Supply Analog ground AVSS 5B Supply Analog ground AVSS 5C Supply Analog ground AVSS 5D Supply Analog ground GPIO4 5E Digital input/output General-purpose input/output pin GPIO1 5F Digital input/output General-purpose input/output pin PWDN 5G Digital input Power-down; active low VCAP1 5H Analog input/output Analog bypass capacitor AVDD 6A Supply Analog supply AVDD 6B Supply Analog supply AVDD 6C Supply Analog supply DRDY 6D Digital output Data ready; active low GPIO3 6E Digital input/output General-purpose input/output pin DAISY_IN(2) 6F Digital input Daisy-chain input RESET 6G Digital input System reset; active low VCAP2 6H — Analog bypass capacitor AVDD1 7A Supply Analog supply for charge pump VCAP3 7B — Analog bypass capacitor, internally-generated AVDD + 1.9V DGND 7C Supply Digital ground DGND 7D Supply Digital ground GPIO2 7E Digital input/output General-purpose input/output pin CS 7F Digital input SPI chip select; active low START 7G Digital input Start conversion DGND 7H Supply Digital ground AVSS1 8A Supply Analog ground for charge pump CLKSEL 8B Digital input Master clock select DVDD 8C Supply Digital power supply DVDD 8D Supply Digital power supply DOUT 8E Digital output SPI data out SCLK 8F Digital input SPI clock CLK 8G Digital input/output External master clock input or internal clock output DIN 8H Digital input SPI data in (2) When DAISY_IN is not used, tie to logic '0'. Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): ADS1194 ADS1196 ADS1198 |
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