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SN54ALS21A Datasheet(PDF) 1 Page - Texas Instruments |
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SN54ALS21A Datasheet(HTML) 1 Page - Texas Instruments |
1 / 17 page SN54ALS21A, SN54AS21, SN74ALS21A, SN74AS21 DUAL 4INPUT POSITIVEAND GATES SDAS085B − APRIL 1982 − REVISED DECEMBER 1994 Copyright 1994, Texas Instruments Incorporated 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 • Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs description These devices contain two independent 4-input positive-AND gates. They perform the Boolean functions Y = A • B • C • D or Y = A + B + C + D in positive logic. The SN54ALS21A and SN54AS21 are characterized for operation over the full military temperature range of − 55 °C to 125°C. The SN74ALS21A and SN74AS21 are characterized for operation from 0 °C to 70°C. FUNCTION TABLE (each gate) INPUTS OUTPUT A B C D OUTPUT Y H H H H H L XX X L X LX X L X XL X L X X X L L logic symbol† logic diagram (positive logic) & 1Y 6 2Y 8 1 1A 2 1B 4 1C 5 1D 9 2A 10 2B 12 2C 13 2D 1Y 1D 1A 1B 1C 2C 2B 2A 2D 2Y 1 2 4 5 9 10 12 13 6 8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. SN54ALS21A, SN54AS21 ...J PACKAGE SN74ALS21A, SN74AS21 ...D OR N PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 1B NC 1C 1D 1Y GND VCC 2D 2C NC 2B 2A 2Y SN54ALS21A, SN54AS21 . . . FK PACKAGE (TOP VIEW) 3 2 1 20 19 9 10 11 12 13 4 5 6 7 8 18 17 16 15 14 2C NC NC NC 2B NC NC 1C NC 1D NC − No internal connection PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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