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54ACT11021 Datasheet(PDF) 1 Page - Texas Instruments |
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54ACT11021 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 5 page 54ACT11021, 74ACT11021 DUAL 4INPUT POSITIVEAND GATES SCAS012B − D2957, JULY 1987 − REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 Copyright 1993, Texas Instruments Incorporated 2−1 • Inputs Are TTL-Voltage Compatible • Flow-Through Architecture Optimizes PCB Layout • Center-Pin V CC and GND Configurations Minimize High-Speed Switching Noise • EPICt (Enhanced-Performance Implanted CMOS) 1- mm Process • 500-mA Typical Latch-Up Immunity at 125°C • Package Options Include Plastic Small- Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These devices contain two independent 4-input AND gates. They perform the Boolean functions Y = A SBSCSD or Y = A + B + C + D in positive logic. The 54ACT11021 is characterized for operation over the full military temperature range of − 55 °C to 125 °C. The 74ACT11021 is characterized for operation from − 40 °C to 85°C. FUNCTION TABLE (each gate) INPUTS OUTPUT A B C D OUTPUT Y H H H H H L XX X L X LX X L X XL X L X X X L L logic symbol† & 3 5 1Y 2Y 1A 1B 1C 1D 2A 2B 2C 2D 2 1 13 12 10 9 7 6 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. logic diagram (positive logic) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1B 1A 1Y GND 2Y 2D 2C NC 1C 1D VCC 2A 2B NC 54ACT11021 ...J PACKAGE 74ACT11021 ...D OR N PACKAGE (TOP VIEW) 3 2 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 2B NC NC NC 2C NC NC 1B NC 1A 54ACT11021 . . . FK PACKAGE (TOP VIEW) NC − No internal connection 1A 1B 1C 1D 1Y 2A 2B 2C 2D 2Y EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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