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BQ24260YFFT Datasheet(PDF) 7 Page - Texas Instruments |
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BQ24260YFFT Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 57 page  Not Recommended for New Designs : bq24260, bq24261 bq24260, bq24261, bq24261M, bq24262 www.ti.com SLUSBU4E – DECEMBER 2013 – REVISED DECEMBER 2015 8.4 Thermal Information bq2426x THERMAL METRIC (1) YFF [DSBGA] RGE [VQFN] UNIT 36 PINS 24 PINS RθJA Junction-to-ambient thermal resistance 55.8 32.6 °C/W RθJCtop Junction-to-case (top) thermal resistance 0.5 30.5 °C/W RθJB Junction-to-board thermal resistance 10 3.3 °C/W ψJT Junction-to-top characterization parameter 2.6 0.4 °C/W ψJB Junction-to-board characterization parameter 9.9 9.3 °C/W RθJCbot Junction-to-case (bottom) thermal resistance N/A 2.6 °C/W (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 8.5 Electrical Characteristics Circuit of Figure 7, VUVLO < VIN < VOVP AND VIN > VBAT+ VSLP, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT CURRENTS VUVLO < VIN < VOVP and VIN > VBAT + VSLP 15 PWM switching YFF Package: VUVLO < VIN < VOVP and VIN > VBAT + VSLP 6.5 mA PWM NOT switching IIN Supply current for control RGE Package: VUVLO < VIN < VOVP and VIN > VBAT + VSLP 6.65 PWM NOT switching 0°C < TJ < 85°C, VIN = 5 V, Hi-Z Mode 250 μA 0°C < TJ < 85°C, VBAT = 4.2 V, VIN = 5 V, 15 SCL, SDA = 0 V or 1.8 V, Hi-Z Mode Battery discharge current in YFF Package: 0°C < TJ < 85°C, VBAT = 4.2 V, VIN = 0 V, IBAT_HIZ High Impedance mode, (BAT, 77 μA SCL, SDA = 0 V or 1.8 V SW, SYS) RGE Package: 0°C < TJ < 85°C, VBAT = 4.2 V, VIN = 0 V, 80 SCL, SDA = 0 V or 1.8 V POWER-PATH MANAGEMENT VMINSYS VMINSYS VMINSYS VSYSREG(LO) System Regulation Voltage VBAT < VMINSYS V + 120 + 80 mV + 100 mV mV VBATREG VBATREG VBATREG bq24260/1/2 - Battery FET turned off, no charging, VBAT > 3.5 V +2.2% +2.5% +2.77% VSYSREG(HI) System Regulation Voltage V VBATREG VBATREG VBATREG bq24261M - Battery FET turned off, no charging, VBAT > 3.5 V +1.4% +1.6% +1.77% Minimum System Voltage VMINSYS VBAT + VDO(SYS_BAT) < 3.5 V 3.44 3.5 3.55 V Regulation Threshold Deglitch time, VMINSYS tDGL(MINSYS_CMP) 8 ms comparator rising Enter supplement mode VBAT – 20 VBSUP1 VBAT > VBUVLO V threshold mV Exit supplement mode VBAT – 5 VBSUP2 VBAT > VBUVLO V threshold mV bq24260/1/2 - VLIM(BGATE) = VBAT – VSYS 4 6 Current Limit, Discharge or ILIM(DISCH) A Supplement Mode (1) bq24261M - VLIM(BGATE) = VBAT – VSYS 6 9 Deglitch Time, SYS Short tDGL(SC1) Circuit during Discharge or Measured from IBAT = 7A to FET off 250 μs Supplement Mode Recovery time, SYS Short tREC(SC1) Circuit during Discharge or 2 s Supplement Mode Battery Range for BGATE 2.5 4.5 V Operation (1) Continuous and periodic pulse currents from BAT to SYS are limited by Output Current specifications in Absolute Maximum Ratings table. Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: bq24260 bq24261 bq24261M bq24262 |
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