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BQ24260YFFT Datasheet(PDF) 9 Page - Texas Instruments |
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BQ24260YFFT Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 57 page  Not Recommended for New Designs : bq24260, bq24261 bq24260, bq24261, bq24261M, bq24262 www.ti.com SLUSBU4E – DECEMBER 2013 – REVISED DECEMBER 2015 Electrical Characteristics (continued) Circuit of Figure 7, VUVLO < VIN < VOVP AND VIN > VBAT+ VSLP, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT CURRENT LIMITING IINLIM=USB100 90 95 100 IINLIM=USB500 450 475 500 IINLIM=USB150 125 140 150 IINLIM=USB900 800 850 900 IINLIM=1.5 A 1425 1500 1575 USB charge mode, VIN = 5 V, Current IINLIM=2 A, YFF IINLIM Input current limiting threshold mA 1850 2000 2150 pulled from SW Package IINLIM=2 A, RGE 1850 2000 2200 Package IINLIM=2.5 A, YFF 2300 2500 2700 Package IINLIM=2.5 A, 2225 2500 2825 RGE Package Input based DPM threshold VIN_DPM 4.2 11.6 V Charge mode, programmable via I2C range VIN_DPM threshold Accuracy –3% 3% VDRV BIAS REGULATOR VDRV Internal bias regulator voltage VIN > 5 V 4.3 4.8 5.3 V IDRV DRV Output Current 0 10 mA DRV Dropout Voltage VDO_DRV IIN = 1 A, VIN = 4.2 V, IDRV = 10 mA 450 mV (VIN – VDRV) STATUS OUTPUT (STAT, INT) Low-level output saturation VOL IO = 10 mA, sink current 0.4 V voltage IIH High-level leakage current V STAT = VINT = 5 V 1 µA INPUT PINS (CD, PSEL) VIL Input low threshold 0.4 V VIH Input high threshold 1.4 V RPULLDOWN CD pulldown resistance CD Only 100 k Ω Deglitch for CD and PSEL CD or PSEL rising/falling 100 µs PROTECTION VUVLO IC active threshold voltage VIN rising 3.2 3.3 3.4 V VUVLO_HYS IC active hysteresis VIN falling from above VUVLO 300 mV Battery Undervoltage Lockout VBATUVLO VBAT falling, VIN > VUVLO 2.4 2.6 V threshold Sleep-mode entry threshold, VSLP 2.0 V < VBAT < VBATREG, VIN falling 0 40 120 mV VIN-VBAT Deglitch time, BAT above tDGL(BAT) VBATUVLO before SYS starts to 1.2 ms rise VSLP_HYS Sleep-mode exit hysteresis VIN rising above VSLP 40 100 190 mV Deglitch time for supply rising tDGL(VSLP) Rising voltage, 2-mV over drive, tRISE=100 ns 30 ms above VSLP+VSLP_HYS bq24260 10.1 10.5 10.9 Input supply OVP threshold VOVP IN rising, 100-mV hysteresis bq24261/1M 13.6 14 14.4 V voltage bq24262 6.25 6.5 6.75 Good Battery Monitor VBATGD VIN Rising 3.51 3.7 3.89 V Threshold (BQ24260/1 only) Deglitch time, VIN OVP in tDGL(BUCK_OVP) IN falling below VOVP 30 ms Buck Mode 1.03 × 1.05 × 1.07 × VBOVP Battery OVP threshold voltage VBAT threshold over VOREG to turn off charger during charge V VBATREG VBATREG VBATREG Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: bq24260 bq24261 bq24261M bq24262 |
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