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74ALVC74 Datasheet(PDF) 11 Page - NXP Semiconductors |
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74ALVC74 Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 20 page 2003 May 26 11 Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive-edge trigger 74ALVC74 handbook, full pagewidth VEXT VCC VI VO MNA616 D.U.T. CL RT RL RL PULSE GENERATOR Fig.8 Load circuitry for switching times. Definitions for test circuits: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VCC VI CL RL VEXT tPLH/tPHL tPZH/tPHZ tPZL/tPLZ 1.65 to 1.95 V VCC 30 pF 1 k Ω open GND 2 × VCC 2.3 to 2.7 V VCC 30 pF 500 Ω open GND 2 × VCC 2.7 V 2.7 V 50 pF 500 Ω open GND 6 V 3.0 to 3.6 V 2.7 V 50 pF 500 Ω open GND 6 V |
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