DAC101S101CIMM datasheet(9/37 Pages) TI1

Part #	DAC101S101CIMM

Description	DAC101S101 and DAC101S101Q-1 10-Bit Micro Power, RRO Digital-to-Analog Converter

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Manufacturer	TI1 [Texas Instruments]

Direct Link	http://www.ti.com

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9

DAC101S101, DAC101S101-Q1

www.ti.com

SNAS321G – JUNE 2005 – REVISED APRIL 2016

Product Folder Links: DAC101S101 DAC101S101-Q1

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(1)

Typical figures are at TJ = 25°C, and represent most likely parametric norms. Test limits are specified to TI's AOQL (Average Outgoing

Quality Level).

(2)

This parameter is ensured by design and/or characterization and is not tested in production.

7.7

A.C. and Timing Requirements

The following specifications apply for VA = +2.7 V to +5.5 V, RL = 2 kΩ to GND, CL = 200 pF to GND, fSCLK = 30 MHz, input

code range 12 to 1011, TA = 25°C, unless otherwise specified.

MIN(1)

TYP(1)

MAX(1)

UNIT

fSCLK

SCLK Frequency

DAC101S101: –40°C

≤ TA ≤ +105°C,

DAC101S101Q: –40°C

≤ TA ≤ +125°C

30

MHz

ts

Output voltage

settling time (2)

100h to 300h code change,

RL = 2 kΩ

CL ≤

200

pF

5

µs

DAC101S101: –40°C

≤ TA ≤

+105°C, DAC101S101Q:

–40°C

≤ TA ≤ +125°C

7.5

SR

Output slew rate

1

V/µs

Glitch impulse

Code change from 200h to 1FFh

12

nV-sec

Digital feedthrough

0.5

nV-sec

tWU

Wake-up time

VA = 5 V

6

µs

VA = 3 V

39

µs

1/fSCL

K

SCLK Cycle time

DAC101S101: –40°C

≤ TA ≤ +105°C,

DAC101S101Q: –40°C

≤ TA ≤ +125°C

33

ns

tH

SCLK High time

5

ns

DAC101S101: –40°C

≤ TA ≤ +105°C,

DAC101S101Q: –40°C

≤ TA ≤ +125°C

13

tL

SCLK Low time

5

ns

DAC101S101: –40°C

≤ TA ≤ +105°C,

DAC101S101Q: –40°C

≤ TA ≤ +125°C

13

tSUCL

Set-up time SYNC

to SCLK rising

edge

−15

ns

DAC101S101: –40°C

≤ TA ≤ +105°C,

DAC101S101Q: –40°C

≤ TA ≤ +125°C

0

tSUD

Data set-up time

2.5

ns

DAC101S101: –40°C

≤ TA ≤ +105°C,

DAC101S101Q: –40°C

≤ TA ≤ +125°C

5

tDHD

Data hold time

2.5

ns

DAC101S101: –40°C

≤ TA ≤ +105°C,

DAC101S101Q: –40°C

≤ TA ≤ +125°C

4.5

tCS

SCLK fall to rise of

SYNC

VA = 5 V

0

ns

DAC101S101:

−40°C ≤ TA ≤

+105°C, DAC101S101Q:

−40°C ≤ TA ≤ +125°C

3

VA = 3 V

−2

ns

DAC101S101:

−40°C ≤ TA ≤

+105°C, DAC101S101Q:

−40°C ≤ TA ≤ +125°C

1

tSYNC

SYNC High time

2.7

≤ VA ≤ 3.6

9

ns

DAC101S101:

−40°C ≤ TA ≤

+105°C, DAC101S101Q:

−40°C ≤ TA ≤ +125°C

20

3.6

≤ VA ≤ 5.5

5

ns

DAC101S101:

−40°C ≤ TA ≤

+105°C, DAC101S101Q:

−40°C ≤ TA ≤ +125°C

10

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DAC101S101CIMM Datasheet(PDF) 9 Page - Texas Instruments

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