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DAC5686IPZPG4 Datasheet(PDF) 3 Page - Texas Instruments |
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DAC5686IPZPG4 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 53 page  FUNCTIONAL BLOCK DIAGRAM y2 y2 y2 y2 y2 y2 y2 y2 CLK1 CLK1C LPF PLLLOCK CLKVDD CLKGND DVDD DGND PLLVDD PLLGND SLEEP FIR1 FIR2 sin AVDD AGND PHSTR NCO cos RESETB 100-Pin HTQFP EXTIO EXTLO 1.2-V Reference BIASJ IOUTA1 IOUTA2 16-Bit FIR5 IOUTB1 IOUTB2 FIR3 x sin(x) TXENABLE DA[15:0] DB[15:0] DEMUX FIR4 CLK2 CLK2C SIF SCLK SDENB SDO SDIO DAC 16-Bit DAC 2y–16y fDATA Internal Clock Generation 2y–16y PLL Clock Multiplier x sin(x) fDATA A Gain B Gain A Offset B Offset B0019-01 QFLAG IOVDD IOGND DAC5686 www.ti.com ............................................................................................................................................................ SLWS147F – APRIL 2003 – REVISED JUNE 2009 Block Diagram of the DAC5686 Copyright © 2003–2009, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): DAC5686 |
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