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COP8SGE5 Datasheet(PDF) 3 Page - Texas Instruments |
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COP8SGE5 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 79 page  COP8SGE5, COP8SGE7, COP8SGH5 COP8SGK5, COP8SGR5, COP8SGR7 www.ti.com SNOS516E – JANUARY 2000 – REVISED APRIL 2013 Block Diagram Figure 1. COP8SGx Block Diagram Device Description ARCHITECTURE The COP8 family is based on a modified Harvard architecture, which allows data tables to be accessed directly from program memory. This is very important with modern microcontroller-based applications, since program memory is usually ROM or EPROM, while data memory is usually RAM. Consequently data tables need to be contained in non-volatile memory, so they are not lost when the microcontroller is powered down. In a modified Harvard architecture, instruction fetch and memory data transfers can be overlapped with a two stage pipeline, which allows the next instruction to be fetched from program memory while the current instruction is being executed using data memory. This is not possible with a Von Neumann single-address bus architecture. The COP8 family supports a software stack scheme that allows the user to incorporate many subroutine calls. This capability is important when using High Level Languages. With a hardware stack, the user is limited to a small fixed number of stack levels. INSTRUCTION SET In today's 8-bit microcontroller application arena cost/performance, flexibility and time to market are several of the key issues that system designers face in attempting to build well-engineered products that compete in the marketplace. Many of these issues can be addressed through the manner in which a microcontroller's instruction set handles processing tasks. And that's why COP8 family offers a unique and code-efficient instruction set—one that provides the flexibility, functionality, reduced costs and faster time to market that today's microcontroller based products require. Code efficiency is important because it enables designers to pack more on-chip functionality into less program memory space. Selecting a microcontroller with less program memory size translates into lower system costs, and the added security of knowing that more code can be packed into the available program memory space. Key Instruction Set Features The COP8 family incorporates a unique combination of instruction set features, which provide designers with optimum code efficiency and program memory utilization. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: COP8SGE5 COP8SGE7 COP8SGH5 COP8SGK5 COP8SGR5 COP8SGR7 |
Similar Part No. - COP8SGE5_15 |
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Similar Description - COP8SGE5_15 |
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