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BQ29312ARTHRG4 Datasheet(PDF) 8 Page - Texas Instruments |
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BQ29312ARTHRG4 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 39 page  www.ti.com GND SR1 SR2 Overload Comparator Short-Circuit SHORT-CIRCUIT DELAY Open- Drain Output Watchdog Timer OD Cell Voltage Translation Power Mode Circuit Drive Control VCELL R SNS RCELL CCELL TOUT RTHERM C THERM THERMISTOR Cell Selection Switches 3.3V LDO POR SHIP_ON SLEEP_ON BAT PACK REG C (REG) FET Logic Gate Driver CHG_ON DSG_ON ZVCHG_ON DSG CHG ZVCHG PACK- PACK+ R(ZVCHG) PMS GG VDD VC1 VC2 VC5 CELL 3 CELL 4 VC3 VC4 CELL 1 CELL 2 GG TS INPUT GG ANALOG INPUT SLEEP REG WDI SLEEP CONTROL 32-kHz INPUT FROM GG GG INTERFACE SDATA ALERT TO GG OPEN-DRAIN OUTPUT GG INTERFACE SCLK SDATA SCLK XALERT Status Output Ctl State Ctl Function Ctl CELL_SEL OCDV OCDT SCC SCD Registers Comparator OVERCURRENT REG 200 k 200 k 0.2-A Current Source _ + - bq29312A SLUS629A – JANUARY 2005 – REVISED AUGUST 2005 FUNCTIONAL BLOCK DIAGRAM 8 |
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