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GENERAL DESCRIPTION

PIN CONNECTIONS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

NC

NC

WE

OE

CE

32−Pin DIP Module

(TOP VIEW)

bq4013/Y/LY

SLUS121A – MAY 1999 – REVISED MAY 2007

128 k

× 8 NONVOLATILE SRAM (5 V, 3.3 V)

• Data Retention for at least 10 Years Without

The

CMOS

bq4013/Y/LY

is

a

nonvolatile

Power

1,048,576-bit static RAM organized as 131,072

words by 8 bits. The integral control circuitry and

• Automatic Write-Protection During

lithium energy source provide reliable nonvolatility

Power-up/Power-down Cycles

coupled with the unlimited write cycles of standard

• Conventional SRAM Operation, Including

SRAM.

Unlimited Write Cycles

The control circuitry constantly monitors the single

• Internal Isolation of Battery before Power

Application

falls out of tolerance, the SRAM is unconditionally

• 5-V or 3.3-V Operation

write-protected

to

prevent

an

inadvertent

write

operation.

• Industry Standard 32-Pin DIP Pinout

At this time the integral energy source is switched on

The

bq4013/Y/LY

uses

extremely

low

standby

current CMOS SRAMs, coupled with small lithium

coin cells to provide nonvolatility without long

write-cycle times and the write-cycle limitations

associated with EEPROM.

The bq4013/Y/LY requires no external circuitry and is

compatible with the industry-standard 1-Mb SRAM

pinout.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 1999–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Not Recommended For New Designs