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BQ40Z60 Datasheet(PDF) 9 Page - Texas Instruments |
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BQ40Z60 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 47 page  9 bq40z60 www.ti.com SLUSAW3C – DECEMBER 2014 – REVISED JULY 2015 Product Folder Links: bq40z60 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated 8.12 Current Wake Comparator Typical values stated where TA = 25°C and VCC = 10.8 V, Min/Max values stated where TA = –40°C to 85°C and VCC = 2.2 V to 26 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VWAKE Wake voltage threshold VWAKE = VSRP – VSRN ±0.3 ±0.625 ±0.9 mV VWAKE = VSRP – VSRN ±0.6 ±1.25 ±1.8 VWAKE = VSRP – VSRN ±1.2 ±2.5 ±3.6 VWAKE = VSRP – VSRN ±2.4 ±5.0 ±7.2 VWAKE(DRIFT) Temperature drift of VWAKE accuracy 0.5% °C tWAKE Time from application of current to wake 0.25 0.5 ms tWAKE(SU) Wake comparator startup time 500 1000 µs (1) Coulomb counter electrical specifications are assured when battery charging function is disabled. (2) 1 LSB = VREF1/(10 × 2 N) = 1.215/(10 × 215) = 3.71 µV (3) Full-scale reference 8.13 Coulomb Counter (1) Typical values stated where TA = 25°C and VCC = 10.8 V, Min/Max values stated where TA = –40°C to 85°C and VCC = 2.2 V to 26 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input voltage range –0.1 0.1 V Full scale range –VREF1/10 VREF1/10 V Integral nonlinearity(2) 16-bit, Best fit over input voltage range ±5.2 ±22.3 LSB Offset error 16-bit, Post-calibration ±5 ±10 µV Offset error drift 15-bit + sign, Post-calibration 0.2 0.3 µV/°C Gain error 15-bit + sign, Over input voltage range ±0.2% ±0.8% FSR(3) Gain error drift 15-bit + sign, Over input voltage range 150 PPM/°C Effective input resistance 2.5 M Ω 8.14 CC Digital Filter Typical values stated where TA = 25°C and VCC = 10.8 V, Min/Max values stated where TA = –40°C to 85°C and VCC = 2.2 V to 26 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Conversion time Single conversion 250 ms Effective resolution Single conversion 15 Bits (1) ADC electrical specifications are assured when battery charging function is disabled. (2) 1 LSB = VREF1/(2 N) = 1.225/(215) = 37.4 µV (when ADCTL[SPEED1, SPEED0] = 0, 0) (3) For VC1–VSS, VC2–VC1, VC3–VC2, VC3–VSS, ACP–VSS, and VREF1/2, the offset error is multiplied by (1/ADC multiplexer scaling factor (K)). 8.15 ADC (1) Over-operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input voltage range Internal reference (VREF1) –0.2 1 V External reference (VREG) –0.2 0.8 × VREG Full scale range VFS = VREF1 or VREG –VFS VFS V Integral nonlinearity(2) 16-bit, Best fit, –0.1 V to 0.8 × VREF1 ±6.6 LSB 16-bit, Best fit, –0.2 V to –0.1 V ±13.1 Offset error(3) 16-bit, Post-calibration, VFS = VREF1 ±67 ±157 µV |
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