1

2

3

4

8

7

6

5

VDD

V4

V3

V2

OUT

CD

VSS

V1

bq771600, bq771601, bq771602

bq771604, bq771605, bq771611, bq771612

www.ti.com

SLUSAX0D – DECEMBER 2012 – REVISED JULY 2015

Table 2. Device Comparison Table

TAPE AND REEL

PART NUMBER

OVP (V)

OV HYSTERESIS (V)

OUTPUT DRIVE

TAPE AND REEL (SMALL)

(LARGE)

bq771600

4.3

0.3

CMOS Active High

bq771600DPJR

bq771600DPJT

bq771601

4.225

0.05

CMOS Active High

bq771601DPJR

bq771601DPJT

bq771602

4.225

0.05

NCH Active Low, Open Drain

bq771602DPJR

bq771602DPJT

bq771603

(1)

4.325

0.05

NCH Active Low, Open Drain

bq771603DPJR

bq771603DPJT

bq771604

4.2

0.05

CMOS Active High

bq771604DPJR

bq771604DPJT

bq771605

3.85

0.25

NCH Active Low

bq771605DPJR

bq771605DPJT

bq771607

(1)

4.2

0.25

CMOS Active High

bq771607DPJR

bq771607DPJT

bq771608

(1)

4.225

0.25

CMOS Active High

bq771608DPJR

bq771608DPJT

bq771609

(1)

4.25

0.05

CMOS Active High

bq771609DPJR

bq771609DPJT

bq771610

(1)

4.250

0.25

CMOS Active High

bq771610DPJR

bq771610DPJT

bq771611

4.35

0.3

CMOS Active High

bq771611DPJR

bq771611DPJT

bq771612

3.9

0.3

CMOS Active High

bq771612DPJR

bq771612DPJT

bq771613

(1)

4.2

0.05

NCH Active Low

bq771613DPJR

bq771613DPJT

bq771614

(1)

4.225

0.25

NCH Active Low

bq771614DPJR

bq771614DPJT

bq771615

(1)

4.25

0.05

NCH Active Low

bq771615DPJR

bq771615DPJT

CMOS Active High or NCH

bq7716xy future options

(2)

3.85–4.65

0–0.3

bq7716xyTBD

bq7716xyTBD

Active Low, Open Drain

(1)

Product Preview only.

(2)

Contact TI.

6 Pin Configuration and Functions

DPJ Package

8-Pin WSON

Top View

Pin Functions

PIN

TYPE

DESCRIPTION

NAME

NO.

CD

7

I/O

External capacitor connection for delay timer

OUT

8

OA

Output drive for overvoltage fault signal

VDD

1

P

Power supply

VSS

6

P

Electrically connected to IC ground and negative terminal of the lowest cell in the stack

V1

5

I

Sense input for positive voltage of the lowest cell in the stack

V2

4

I

Sense input for positive voltage of the second cell from the bottom of the stack

V3

3

I

Sense input for positive voltage of the third cell from the bottom of the stack

V4

2

I

Sense input for positive voltage of the fourth cell from the bottom of the stack

(1)

IA = Input Analog, OA = Output Analog, P = Power Connection

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