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HD3SS214I Datasheet(PDF) 3 Page - Texas Instruments |
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HD3SS214I Datasheet(HTML) 3 Page - Texas Instruments |
3 / 25 page 1 2 3 4 5 6 7 8 9 A B C D E F G H J Not to scale Dx_SEL VDD DA0(n) DA1(n) DA2(n) DA3(p) DA3(n) DC0(n) DC0(p) GND DA0(p) DA1(p) DA2(p) OE DB0(p) DB0(n) AUX_SEL GND DC1(n) DC1(p) DB1(p) DB1(n) DC2(n) DC2(p) DB2(p) DB2(n) DC3(n) DC3(p) DB3(p) DB3(n) GND GND AUXC(n) AUXC(p) HPDB GND DDCCLK_B AUXB(p) GND DDCCLK_A AUXA(p) HPDC HPDA DDCCLK_C VDD DDCDAT_B AUXB(n) DDCDAT_C DDCDAT_A AUXA(n) 3 HD3SS214 www.ti.com SLAS907A – DECEMBER 2015 – REVISED JULY 2016 Product Folder Links: HD3SS214 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated 5 Pin Configuration and Functions ZQE Package 50-ball (µBGA) Top View (1) The high speed data ports incorporate 20-kΩ pull down resistors that are switched in when a port is not selected and switched out when the port is selected. Pin Functions PIN I/O DESCRIPTION(1) NO. NAME A1 Dx_SEL Control I High Speed Port Selection Control Pins A2,J4 VDD Supply 3.3 V Positive power supply voltage A4 DA0(n) I/O Port A, Channel 0, High Speed Negative Signal A5 DA1(n) I/O Port A, Channel 1, High Speed Negative Signal |
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