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ADS850Y Datasheet(PDF) 5 Page - Texas Instruments |
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ADS850Y Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 15 page  ADS850 SBAS154C 5 www.ti.com TIMING DIAGRAMS SYMBOL DESCRIPTION MIN TYP MAX UNITS tCONV Convert Clock Period 100 100 µsns tL Clock Pulse LOW 48 tCONV/2 ns t H Clock Pulse HIGH 48 tCONV/2 ns t D Aperture Delay 2 ns t 1 Data Hold Time, CL = 0pF 3.9 ns t2 New Data Delay Time, CL = 15pF max 12 ns 7 Clock Cycles Data Invalid t D t L t H t CONV N – 7N – 6N – 5N – 4N – 3N – 2N – 1N Data Out CLK Analog In N t 2 N + 1 N + 2 N + 3 N + 4 N + 5 N + 6 N + 7 t 1 t P CAL CLK BUSY Data Out 32,768 Cycles Data Invalid Calibrated ADC t P = 2 • tCONV Data Valid 7 Clock Cycles TIMING DIAGRAM 1. Pipeline Delay Timing. TIMING DIAGRAM 2. Power-On Calibration Mode Timing. TIMING DIAGRAM 3. Calibration-On-Demand Mode Timing. TIMING DIAGRAM 4. Reset Mode Timing. V REF CLK BUSY Data Out t S t S = Time for reference to settle (< 200ms). 32,768 Cycles Delay Time = 221 Clocks 7 Clock Cycles Data Invalid t P RST CLK Data Out Uncalibrated ADC |
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