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PC87393-VJG Datasheet(PDF) 8 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87393-VJG
Description  100-Pin LPC SuperI/O Devices for Portable Applications
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87393-VJG Datasheet(HTML) 8 Page - National Semiconductor (TI)

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Table of Contents (Continued)
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4.3.4
WATCHDOG Status Register (WDST) ........................................................................ 83
4.4
WATCHDOG TIMER REGISTER BITMAP ............................................................................... 83
5.0
Game Port (GMP)
5.1
OVERVIEW ............................................................................................................................... 84
5.2
FUNCTIONAL DESCRIPTION .................................................................................................. 84
5.2.1
Game Device Axis Position Indication ......................................................................... 84
5.2.2
Capturing the Position ................................................................................................. 85
5.2.3
Button Status Indication ............................................................................................... 85
5.2.4
Operation Modes ......................................................................................................... 86
5.2.5
Operation Control ........................................................................................................ 87
5.3
GAME PORT REGISTERS ....................................................................................................... 87
5.3.1
Game Port Register Map ............................................................................................. 87
5.3.2
Game Port Control Register (GMPCTL) ...................................................................... 88
5.3.3
Game Port Legacy Status Register (GMPLST) ........................................................... 89
5.3.4
Game Port Extended Status Register (GMPXST) ....................................................... 90
5.3.5
Game Port Interrupt Enable Register (GMPIEN) ......................................................... 91
5.3.6
Game Device A X-Axis Position Low Byte (GMPAXL) ................................................ 92
5.3.7
Game Device A X-Axis Position High Byte (GMPAXH) ............................................... 92
5.3.8
Game Device A Y-Axis Position Low Byte (GMPAYL) ................................................ 92
5.3.9
Game Device A Y-Axis Position High Byte (GMPAYH) ............................................... 92
5.3.10
Game Device B X-Axis Position Low Byte (GMPBXL) ................................................ 93
5.3.11
Game Device B X-Axis Position High Byte (GMPBXH) ............................................... 93
5.3.12
Game Device B Y-Axis Position Low Byte (GMPBYL) ................................................ 93
5.3.13
Game Device B Y-Axis Position High Byte (GMPBYH) ............................................... 93
5.3.14
Game Port Event Polarity Register (GMPEPOL) ........................................................ 94
5.4
GAME PORT BITMAP ............................................................................................................... 95
6.0
Musical Instrument Digital Interface (MIDI) Port
6.1
OVERVIEW ............................................................................................................................... 96
6.2
FUNCTIONAL DESCRIPTION .................................................................................................. 96
6.2.1
Internal Bus Interface Unit ........................................................................................... 97
6.2.2
Port Control and Status Registers ............................................................................... 97
6.2.3
Data Buffers and FIFOs ............................................................................................... 97
6.2.4
MIDI Communication Engine ....................................................................................... 97
6.2.5
MIDI Signals Routing Control Logic ............................................................................. 98
6.2.6
Operation Modes ......................................................................................................... 98
6.2.7
MIDI Port Status Flags ................................................................................................ 99
6.2.8
MIDI Port Interrupts ................................................................................................... 100
6.2.9
Enhanced MIDI Port Features ................................................................................... 101
6.3
MIDI PORT REGISTERS ........................................................................................................ 102
6.3.1
MIDI Port Register Map ............................................................................................. 102
6.3.2
MIDI Data In Register (MDI) ...................................................................................... 102
6.3.3
MIDI Data Out Register (MDO) ................................................................................. 102
6.3.4
MIDI Status Register (MSTAT) .................................................................................. 103


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