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TMP175AID Datasheet(PDF) 2 Page - Texas Instruments |
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TMP175AID Datasheet(HTML) 2 Page - Texas Instruments |
2 / 13 page TMP175, 75 2 SBOS288C www.ti.com ABSOLUTE MAXIMUM RATINGS(1) Power Supply, V+ ............................................................................... 7.0V Input Voltage(2) .................................................................... –0.5V to 7.0V Input Current ..................................................................................... 10mA Operating Temperature Range ..................................... –55°C to +127°C Storage Temperature Range ......................................... –60°C to +130°C Junction Temperature (TJ Max) .................................................... +150°C Lead Temperature (soldering) ....................................................... +300°C NOTES: (1) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability. (2) Input voltage rating applies to all TMP175 and TMP75 input voltages. SPECIFIED PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER MEDIA, QUANTITY TMP175 SO-8 D –40°C to +125°C TMP175 TMP175AID Rails, 100 "" "" " TMP175AIDR Tape and Reel, 2500 TMP75 SO-8 D –40°C to +125°C TMP75 TMP75AID Rails, 100 "" "" " TMP75AIDR Tape and Reel, 2500 PACKAGE/ORDERING INFORMATION(1) NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. PIN CONFIGURATIONS Top View SO-8 SDA SCL ALERT GND V+ A0 A1 A2 1 2 3 4 8 7 6 5 ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper han- dling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. SDA SCL ALERT GND V+ A0 A1 A2 1 2 3 4 8 7 6 5 NOTE: Pin 1 is determined by orienting the package marking as indicated in the diagram. |
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