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UPD720100AGM-8EY Datasheet(PDF) 10 Page - NEC |
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UPD720100AGM-8EY Datasheet(HTML) 10 Page - NEC |
10 / 32 page Data Sheet S15535EJ2V0DS 10 µµµµPD720100A 2. ELECTRICAL SPECIFICATIONS 2.1 Buffer List • 3 V input buffer with Pull down resister NTEST1, NTEST2, TEST, SMC, SIN/TIN, SRMOD, AMC, SCK/TCLK, CLKSEL, TEB • 3 V output buffer SOT/TOUT (IOL = 9 mA), SRCLK (IOL = 3 mA) • 3 V bi-directional buffer LEGC (IOL = 9 mA), SRDTA (IOL = 3 mA) • 3 V Oscillator interface XT1/SCLK, XT2 • 5 V input buffer VCCRST0, PIN_EN • 5 V IOL = 12 mA N-ch Open Drain buffer SMI0, PME0, INTA0, INTB0, INTC0, SERR0 • 5 V IOL = 6 mA 3-state Output buffer A20S • 5 V IOL = 12 mA 3-state Output buffer IRO1, IRO2 • 5 V PCI Input buffer with enable (OR type) PCLK, VBBRST0, GNT0, IDSEL • 5 V PCI IOL = 12 mA 3-state Output buffer REQ0 • 5 V PCI IOL = 12 mA bi-directional buffer with input enable (OR-type) AD(31:0), CBE(3:0)0, PAR, FRAME0, IRDY0, TRDY0, STOP0, DEVSEL0, PERR0, CRUN0, IRI(1:2), PPON(1:5), OCI(1:5) • USB interface DP(1:5), DM(1:5), RSDP(1:5), RSDM(1:5), PC1, PC2, RREF, SELDAT, SELCLK Above, “5 V” refers to a 3-V buffer with 5-V tolerant circuit. Therefore, it is possible to have a 5-V connection for an external bus, but the output level will be only up to 3 V, which is the VDD voltage. Similarly, “5 V PCI” above refers to a PCI buffer that has a 5-V tolerant circuit, which meets the 3-V PCI standard; it does not refer to a PCI buffer that meets the 5-V PCI standard. |
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