SN65MLVD200, SN65MLVD202

SN65MLVD204, SN65MLVD205

MULTIPOINT–LVDS LINE DRIVERS AND RECEIVERS

SLLS463E – SEPTEMBER 2001 – REVISED JUNE 2003

1

POST OFFICE BOX 655303

100 Mbps

– Driver: 50 mW Typical

– Receiver: 30 mW Typical

M-LVDS Standard TIA/EIA–899 for

Multipoint Data Interchange

Times for Improved Signal Quality

Allows Data Transfer With up to 2 V of

Ground Noise

Hysteresis

(100 mV) Threshold to Detect Open-Circuit

and Idle-Bus Conditions

for Drivers and 5 ns for Receivers

Continuous Short Circuit Without Damage

(SN65MLVD201, 203, 206, and 207)

1

2

3

4

8

7

6

5

R

RE

DE

D

B

A

GND

SN65MLVD200D (Marked as MF200)

SN65MLVD204D (Marked as MF204)

(TOP VIEW)

4

3

1

2

DE

D

RE

R

6

7

A

B

logic diagram (positive logic)

SN65MLVD202D (Marked as MLVD202)

SN65MLVD205D (Marked as MLVD205)

(TOP VIEW)

1

2

3

4

5

6

7

14

13

12

11

10

9

8

NC

R

RE

DE

D

GND

GND

A

B

Z

Y

NC

NC – No internal connection

5

4

2

3

DE

D

RE

R

12

11

A

B

10

9

Y

Z

SN65MLVD202, SN65MLVD205

SN65MLVD200, SN65MLVD204

Copyright

 2001–2003, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

†The signaling rate of a line is the number of voltage transitions that are made per second expressed in bps (bits per second) units.