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DP8421V Datasheet(PDF) 10 Page - National Semiconductor (TI) |
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DP8421V Datasheet(HTML) 10 Page - National Semiconductor (TI) |
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10 / 60 page  30 Programming and Resetting (Continued) 33 PROGRAMMING BIT DEFINITIONS Symbol Description ECAS0 Extend CAS Refresh Request Select 0 The CASn outputs will be negated with the RASn outputs when AREQ (or AREQB DP8422V DP84T22 only) is negated The WE output pin will function as write enable 1 The CASn outputs will be negated during an acccess (Port A (or Port B DP8422V DP84T22 only)) when their corresponding ECASn inputs are negated This feature allows the CAS outputs to be extended beyond the RAS outputs negating Scrubbing refreshes are NOT affected During scrubbing refreshes the CAS outputs will negate along with the RAS outputs regardless of the state of the ECAS inputs The WE output will function as ReFresh ReQuest (RFRQ) when this mode is programmed B1 Access Mode Select 0 ACCESS MODE 0 ALE pulsing high sets an internal latch On the next positive edge of CLK the access (RAS) will start AREQ will terminate the access 1 ACCESS MODE 1 ADS asserted starts the access (RAS) immediately AREQ will terminate the access B0 Address Latch Mode 0 ADS or ALE asserted for Port A or AREQB asserted for Port B with the appropriate GRANT latch the input row column and bank address 1 The row column and bank latches are fall through C9 Delay CAS during WRITE Accesses 0 CAS is treated the same for both READ and WRITE accesses 1 During WRITE accesses CAS will be asserted by the event that occurs last CAS asserted by the internal delay line or CAS asserted on the positive edge of CLK after RAS is asserted C8 Row Address Hold Time 0 Row Address Hold Time e 25 ns minimum 1 Row Address Hold Time e 15 ns minimum C7 Column Address Setup Time 0 Column Address Setup Time e 10 ns miniumum 1 Column Address Setup Time e 0 ns minimum C6 C5 C4 RAS and CAS Configuration ModesError Scrubbing during Refresh 0 0 0 RAS0 – 3 and CAS0 – 3 are all selected during an access ECASn must be asserted for CASn to be asserted B0 and B1 are not used during an access Error scrubbing during refresh 0 0 1 RAS and CAS pairs are selected during an access by B1 ECASn must be asserted for CASn to be asserted B1 e 0 during an access selects RAS0 – 1 and CAS0–1 B1 e 1 during an access selects RAS2 – 3 and CAS2–3 B0 is not used during an Access Error scrubbing during refresh 0 1 0 RAS and CAS singles are selected during an access by B0 – 1 ECASn must be asserted for CASn to be asserted B1 e 0 B0 e 0 during an access selects RAS0 and CAS0 B1 e 0 B0 e 1 during an access selects RAS1 and CAS1 B1 e 1 B0 e 0 during an access selects RAS2 and CAS2 B1 e 1 B0 e 1 during an access selects RAS3 and CAS3 Error scrubbing during refresh 0 1 1 RAS0 – 3 and CAS0 – 3 are all selected during an access ECASn must be asserted for CASn to be asserted B1 B0 are not used during an access No error scrubbing (RAS only refreshing) 1 0 0 RAS pairs are selected by B1 CAS0 – 3 are all selected ECASn must be asserted for CASn to be asserted B1 e 0 during an access selects RAS0 – 1 and CAS0–3 B1 e 1 during an access selects RAS2 – 3 and CAS0–3 B0 is not used during an access No error scrubbing 10 |
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