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SN65HVD30-EP Datasheet(PDF) 4 Page - Texas Instruments |
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SN65HVD30-EP Datasheet(HTML) 4 Page - Texas Instruments |
4 / 37 page 1 2 3 4 5 6 7 14 13 12 11 10 9 8 NC R RE DE D GND GND VCC VCC A B Z Y NC NC - No internal connection Pins 6 and 7 are connected together internally Pins 13 and 14 are connected together internally R D B A Z Y 7 8 6 5 2 3 1 2 3 4 8 7 6 5 R D VCC B A Z Y GND SN65HVD30-EP, SN65HVD31-EP, SN65HVD32-EP SN65HVD33-EP, SN65HVD34-EP, SN65HVD35-EP SGLS367E – SEPTEMBER 2006 – REVISED SEPTEMBER 2015 www.ti.com 6 Pin Configuration and Functions D Package D Package 8-Pin SOIC 14-Pin SOIC Top View Top View Pin Functions PIN TYPE DESCRIPTION D D NAME (8-PIN) (14-PIN) A 8 12 Bus input Receiver input (complementary to B) B 7 11 Bus input Receiver input (complementary to A) D 3 5 Digital input Driver data input DE — 4 Digital input Driver enable, active high Reference GND 4 6, 7 Local device ground potential NC — 1, 8 No connect No connect; must be left floating R 2 2 Digital output Receive data output RE — 3 Digital output Receiver enable, active low VCC 1 13, 14 Supply 3-V to 3.6-V supply Y 5 9 Bus output Driver output (complementary to Z) Z 6 10 Bus output Driver output (complementary to Y) 4 Submit Documentation Feedback Copyright © 2006–2015, Texas Instruments Incorporated Product Folder Links: SN65HVD30-EP SN65HVD31-EP SN65HVD32-EP SN65HVD33-EP SN65HVD34-EP SN65HVD35-EP |
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