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DP8571A Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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DP8571A Datasheet(HTML) 6 Page - National Semiconductor (TI) |
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6 / 24 page  Functional Description The DP8571A contains a fast access real time clock two 10 MHz 16-bit timers interrupt control logic power fail detect logic and CMOS RAM All functions of the TCP are con- trolled by a set of nine registers A simplified block diagram that shows the major functional blocks is given in Figure 1 The blocks are described in the following sections 1 Real Time Clock 2 Oscillator Prescaler 3 Interrupt Logic 4 Power Failure Logic 5 Additional Supply Management 6 Timers The memory map of the TCP is shown in the memory ad- dressing table The memory map consists of two 31 byte pages with a main status register that is common to both pages A control bit in the Main Status Register is used to select either page Figure 2 shows the basic concept Page 0 contains all the clock timer functions while page 1 has scratch pad RAM The control registers are split into two separate blocks to allow page 1 to be used entirely as scratch pad RAM Again a control bit in the Main Status Register is used to select either control register block TLF9979 – 6 FIGURE 2 DP8571A Internal Memory Map 6 |
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Similar Description - DP8571A |
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