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SN74ALS845DW Datasheet(PDF) 1 Page - Texas Instruments |
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SN74ALS845DW Datasheet(HTML) 1 Page - Texas Instruments |
1 / 9 page DW OR NT PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 OE1 OE2 1D 2D 3D 4D 5D 6D 7D 8D CLR GND VCC OE3 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q PRE LE SN74ALS845 8BIT BUSINTERFACE DTYPE LATCH WITH 3STATE OUTPUTS SDAS233A − DECEMBER 1983 − REVISED JANUARY 1995 Copyright 1995, Texas Instruments Incorporated 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 • 3-State Buffer-Type Outputs Drive Bus Lines Directly • Bus-Structured Pinout • Provides Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity • Buffered Control Inputs to Reduce dc Loading Effects • Power-Up High-Impedance State • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs description This 8-bit latch features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. Because the clear (CLR) and preset (PRE) inputs are independent of the clock (CLK) input, taking CLR low causes the eight Q outputs to go low. Taking PRE low causes the eight Q outputs to go high. When both PRE and CLR are taken low, the outputs follow the preset condition. The buffered output-enable (OE1, OE2, and OE3) inputs can be used to place the eight outputs in either a normal logic state (high or low levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. The output enables do not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. The -1 version of the SN74ALS845 is identical to the standard version, except that the recommended maximum IOL for the -1 version is increased to 48 mA. The SN74ALS845 is characterized for operation from 0 °C to 70°C. FUNCTION TABLE INPUTS OUTPUT PRE CLR OE1 OE2 OE3 LE D OUTPUT Q L X L L L X X H H LL LL X X L H HL L L HL L H HL L L H H H H H L LL LL Q0 X XX X H XX Z X XX H X XX Z X X H X X X X Z PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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