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SN74AUP1G02DBVT Datasheet(PDF) 3 Page - Texas Instruments |
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SN74AUP1G02DBVT Datasheet(HTML) 3 Page - Texas Instruments |
3 / 34 page DBV PACKAGE (TOP VIEW) 5 1 2 V Y 4 3 CC A B GND DCK PACKAGE (TOP VIEW) 5 1 2 V Y CC 4 3 A B GND DRL PACKAGE (TOP VIEW) 5 1 2 4 V Y CC 3 A B (TOP VIEW) B N.C. A 6 5 4 2 3 GND Y VCC 1 GND Y 3 4 2 B 5 A 6 1 N.C. VCC DSF PACKAGE (TOP VIEW) YFP PACKAGE ( VIEW) TOP GND A Y V CC B 3 6 2 1 4 5 DNU A1 B1 C1 A2 B2 C2 GND DRY PACKAGE 1 5 2 3 A GND Y V CC DPW PACKAGE (TOP VIEW) B 4 DNU – Do not use N.C. – No internal connection See mechanical drawings for dimensions. SN74AUP1G02 www.ti.com SCES568H –JUNE 2004–REVISED OCTOBER 2014 6 Pin Configuration and Functions Pin Functions PIN I/O DESCRIPTION DBV, DCK, DRY, NAME DPW YFP DRL DSF A 1 2 1 A1 I Input A B 2 1 2 B2 I Input B GND 3 3 3 B3 — Ground Y 4 4 4 C4 O Output Y VCC 5 5 6 A6 — Power Pin Copyright © 2004–2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: SN74AUP1G02 |
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