Unused Input

Input

Output

Input

Unused Input

Output

0

10

20

30

40

2

3

4

5

6

V

CL=50pF

C002

11

SN54HC08, SN74HC08

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SCLS081G – DECEMBER 1982 – REVISED JUNE 2016

Product Folder Links: SN54HC08 SN74HC08

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Copyright © 1982–2016, Texas Instruments Incorporated

Typical Application (continued)

9.2.3 Application Curve

10 Power Supply Recommendations

The power supply can be any voltage between the minimum and maximum supply voltage rating located in

Recommended Operating Conditions.

Each VCC pin must have a good bypass capacitor to prevent power disturbance. For devices with a single

supply, a 0.1-

μF capacitor is recommended and if there are multiple VCC pins then 0.01-μF or 0.022-μF

capacitor is recommended for each power pin. Multiple bypass capacitors may be used in parallel to reject

different frequencies of noise. 0.1-

μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor

must be installed as close to the power pin as possible for best results.

11 Layout

11.1 Layout Guidelines

When using multiple bit logic devices inputs must not ever float. In many cases, functions or parts of functions of

digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3

of the 4 buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at

the outside connections result in undefined operational states. Specified below are the rules that must be

observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low

bias to prevent them from floating. The logic level that must be applied to any particular unused input depends on

the function of the device. Generally, the inputs are tied to GND or VCC, whichever makes more sense or is

more convenient.

11.2 Layout Example

Figure 6. Layout Diagram