SN54HC646, SN74HC646

OCTAL BUS TRANSCEIVERS AND REGISTERS

WITH 3-STATE OUTPUTS

SCLS150C – DECEMBER 1982 – REVISED MARCH 2003

1

POST OFFICE BOX 655303

To 15 LSTTL Loads

14 15 16 17

SN54HC646 ...JT OR W PACKAGE

SN74HC646 . . . DW OR NT PACKAGE

(TOP VIEW)

SN54HC646 . . . FK PACKAGE

(TOP VIEW)

CLKAB

SAB

DIR

A1

A2

A3

A4

A5

A6

A7

A8

GND

CLKBA

SBA

OE

B1

B2

B3

B4

B5

B6

B7

B8

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

5

6

7

8

9

10

11

25

24

23

22

21

20

19

43

2 1 28

12 13

OE

B1

B2

NC

B3

B4

B5

A1

A2

A3

NC

A4

A5

A6

18

27 26

NC – No internal connection

description/ordering information

The ’HC646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control

circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.

Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB

or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed

with the ’HC646 devices.

Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver

mode, data present at the high-impedance port may be stored in either or both registers.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR

determines which bus receives data when OE is active (low). In the isolation mode (OE high), A data may be

stored in one register and /or B data may be stored in the other register.

ORDERING INFORMATION

TA

PACKAGE†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – NT

Tube

SN74HC646NT

SN74HC646NT

–40

°C to 85°C

SOIC

DW

Tube

SN74HC646DW

HC646

SOIC – DW

Tape and reel

SN74HC646DWR

HC646

CDIP – JT

Tube

SNJ54HC646JT

SNJ54HC646JT

–55

°C to 125°C

CFP – W

Tube

SNJ54HC646W

SNJ54HC646W

LCCC – FK

Tube

SNJ54HC646FK

SNJ54HC646FK

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Copyright

 2003, Texas Instruments Incorporated

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.