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SN74LVC1G04

SCES214AD–APRIL1999–REVISED OCTOBER 2014

SN74LVC1G04 Single Inverter Gate

1 Features

3 Description

This

single

inverter

gate

is

designed

for

1

Package (DPW) with 0.5-mm Pitch

The SN74LVC1G04 device performs the Boolean

function Y = A.

• Inputs Accept Voltages up to 5.5 V Allowing Down

The CMOS device has high output drive while

maintaining low static power dissipation over a broad

The SN74LVC1G04 device is available in a variety of

• ±24-mA Output Drive at 3.3-V

packages, including the ultra-small DPW package

with a body size of 0.8 mm × 0.8 mm.

Mode, and Back-Drive Protection

• Latch-Up Performance Exceeds 100 mA

Device Information(1)

Per JESD 78, Class II

DEVICE NAME

PACKAGE

BODY SIZE

• ESD Protection Exceeds JESD 22

SOT-23 (5)

2.9mm × 1.6mm

SC70 (5)

2.0mm × 1.25mm

– 2000-V Human-Body Model (A114-A)

SN74LVC1G04

SON (6)

1.45mm × 1.0mm

– 200-V Machine Model (A115-A)

SON (6)

1.0mm × 1.0mm

– 1000-V Charged-Device Model (C101)

X2SON (4)

0.8mm × 0.8mm

2 Applications

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

• AV Receiver

• Audio Dock: Portable

• Blu-ray Player and Home Theater

• Embedded PC

• MP3 Player/Recorder (Portable Audio)

• Personal Digital Assistant (PDA)

• Power: Telecom/Server AC/DC Supply: Single

Controller: Analog and Digital

• Solid State Drive (SSD): Client and Enterprise

• TV: LCD/Digital and High-Definition (HDTV)

• Tablet: Enterprise

• Video Analytics: Server

• Wireless Headset, Keyboard, and Mouse

4 Simplified Schematic

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.