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SN74LVC244APWTE4 Datasheet(PDF) 9 Page - Texas Instruments |
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SN74LVC244APWTE4 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 34 page 1 2 18 1Y1 1OE 1A1 4 16 1Y2 1A2 6 14 1Y3 1A3 8 12 1Y4 1A4 19 11 9 2Y1 2OE 2A1 13 7 2Y2 2A2 15 5 2Y3 2A3 17 3 2Y4 2A4 Pin numbers shown are for the DB, DGV, DW, N, NS, PW, and RGY packages. 9 SN74LVC244A www.ti.com SCAS414AA – NOVEMBER 1992 – REVISED JUNE 2016 Product Folder Links: SN74LVC244A Submit Documentation Feedback Copyright © 1992–2016, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview The SN74LVC244A device is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. The device passes data from the A inputs to the Y outputs when OE is low. The outputs are in the high- impedance state when OE is high. OE should be tied to VCC through a pullup resistor to ensure the high- impedance state during power up or power down; the minimum value of the resistor is determined by the current- sinking capability of the driver. 8.2 Functional Block Diagram 8.3 Feature Description • Allows down voltage translation – 5 V to 3.3 V – 5 V or 3.3 V to 1.8 V • Inputs accept voltage levels up to 5.5 V • It is available in ultra small logic 20 pin QFN package at 0.5 mm max height with 0.4 mm pitch. 8.4 Device Functional Modes Table 1. Function Table INPUTS OUTPUT Y OE A L H H L L L H X Hi-Z |
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