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LM9820 Datasheet(PDF) 6 Page - Texas Instruments |
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LM9820 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 22 page  LM9820 Electrical Characteristics (Continued) The following specifications apply for AGND = DGND = 0V, V A =VD = +5.0VDC,fMCLK = 24 MHz, RS =25Ω. Boldface limits apply for T A =TJ =TMIN to TMAX; all other limits TA =TJ = 25˚C. All LSB limits are in units of the LM9810’s 12-bit ADC. (Notes 7, 8, 12) Symbol Parameter Conditions Typical Limits Units (Note 9) (Note 10) (Limits) SYSTEM CHARACTERISTICS (SEE SECTION 1.7.1, INTERNAL OFFSETS) V OS1 Pre-Boost Analog Channel Offset Error, 18 -22.2 LSB (min) CIS Mode +57 LSB (max) V OS2 Pre-PGA Analog Channel Offset Error -40 -94.3 LSB (min) +16.4 LSB (max) V OS3 Post-PGA Analog Channel Offset Error -44 -121 LSB (min) +28 LSB (max) DC and Logic Electrical Characteristics The following specifications apply for AGND = DGND = 0V, V A =VD = +5.0VDC,fMCLK = 24 MHz, Rs =25Ω. Boldface limits apply for T A =TJ =TMIN to TMAX; all other limits TA =TJ = 25˚C. (Notes 7, 8) Symbol Parameter Conditions Typical Limits Units (Note 9) (Note 10) (Limits) D0–D2, MCLK, NewLine, SampCLK DIGITAL INPUT CHARACTERISTICS V IN(1) Logical “1” Input Voltage V D = 5.25V 2.0 V (max) V IN(0) Logical “0” Input Voltage V D = 4.75V 0.8 V (min) I IN Input Leakage Current V IN =VD 0.1 µA (max) V IN = DGND −0.1 µA (max) C IN Input Capacitance 5 pF D0–D5, DIGITAL OUTPUT CHARACTERISTICS V OUT(1) Logical “1” Output Voltage V D = 4.75V, IOUT = −360 µA 2.4 V (min) V D = 4.75V, IOUT = −10 µA 4.4 V (min) V OUT(0) Logical “0” Output Voltage V D = 5.25V, IOUT = 1.6 mA 0.4 V (max) I OUT TRI-STATE® Output Current V OUT = DGND 0.1 µA (D0–D5 only) V OUT =VD −0.1 µA POWER SUPPLY CHARACTERISTICS I A Analog Supply Current Operating 45 57 mA (max) Standby with Input Clocks Stopped 0.8 0.9 mA (max) Standby with Input Clocks Running 3.0 mA I D Digital Supply Current (Note 15) Operating 220 320 µA (max) Standby with Input Clocks Stopped 110 200 µA (max) Standby with Input Clocks Running 220 µA AC Electrical Characteristics The following specifications apply for AGND = DGND = 0V, V A =VD = +5.0VDC,fMCLK = 24 MHz, tMCLK = 1/fMCLK, t r =tf = 5 ns, Rs =25Ω. Boldface limits apply for TA =TJ =TMIN to TMAX; all other limits TA =TJ = 25˚C. (Notes 7, 8) Symbol Parameter Conditions Typical Limits Units (Note 9) (Note 10) (Limits) f MCLK Maximum MCLK Frequency 24 MHz (min) MCLK Duty Cycle 40 (min) 60 (max) t MCLK MCLK Period 41 ns (min) t SCNL SampCLK Falling Edge before NewLine Falling Edge 3 t MCLK (min) t SampCLK SampCLK Period 4 t MCLK (min) t SampLo Low Time for SampCLK 50 ns (min) www.national.com 5 |
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