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SN75ALS175NSRE4 Datasheet(PDF) 4 Page - Texas Instruments |
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SN75ALS175NSRE4 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 12 page SN75ALS175 QUADRUPLE DIFFERENTIAL LINE RECEIVER SLLS131C – SEPTEMBER 1991 – REVISED MAY 1995 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended ranges of common-mode input voltage, supply voltage and operating free-air temperature (unless otherwise noted) (see Note 3) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIT+ Positive-going input threshold voltage 200 mV VIT– Negative-going input threshold voltage –200‡ mV Vhys Hysteresis voltage (VIT + – VIT –) 50 mV VIK Enable-input clamp voltage II = – 18 mA – 1.5 V VOH High-level output voltage VID = 200 mV, IOH = – 400 µA, See Figure 1 2.7 V VOL Low-level output voltage VID = – 200 mV, IOL = 8 mA, See Figure 1 0.45 V IOZ High-impedance-state output current VO = 0.4 V to 2.4 V ±20 µA II Line input current Other input at 0 V See Note 3 VI = 12 V 1 mA II Line input current Other input at 0 V, See Note 3 VI = – 7 V – 0.8 mA IIH High-level enable-input current VIH(E) = 2.7 V 20 µA IIL Low-level enable-input current VIL(E) = 0.4 V – 100 µA ri Input resistance 12 k Ω IOS Short-circuit output current VO = 0 –15 –85 mA ICC Suply current (total package) No load, Outputs enabled 16 24 mA ICC Suply current (total package) No load, Outputs disabled 18 27 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold voltage levels only. NOTE 3: Refer to ANSI Standard RS-485 for exact conditions. switching characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT tPHL Propagation delay time, high- to low-level output VID = – 2.5 V to 2.5 V, 9 18 27 ns tPLH Propagation delay time, low- to high-level output CL = 15 pF, See Figure 2 9 18 27 ns tPZH Output enable time to high level CL =15 pF See Figure 3 4 12 18 ns tPZL Output enable time to low level CL = 15 pF, See Figure 3 6 13 21 ns tPHZ Output disable time from high level CL =15 pF See Figure 3 10 21 27 ns tPLZ Output disable time from low level CL = 15 pF, See Figure 3 8 15 25 ns † All typical values are at VCC = 5 V, TA = 25°C. |
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