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LMG3410 Datasheet(PDF) 6 Page - Texas Instruments |
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LMG3410 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 33 page  6 LMG3410 SNOSD10A – APRIL 2016 – REVISED JUNE 2016 www.ti.com Product Folder Links: LMG3410 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 6.6 Switching Characteristics over operating free-air temperature range, 9.5 V < VDD < 18 V, VNEG = -14 V, VBUS = 400 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT GaN FET dv/dt Turn-on Drain Slew Rate RDRV = 15 kΩ 100 V/ns RDRV = 40 kΩ 50 RDRV = 100 kΩ 25 Δdv/dt Slew Rate Variation turn on, IL = 5 A, RDRV = 40 kΩ 25% dv/dt Edge Rate Immunity Drain dv/dt, device remains off inductor-fed, max di/dt = 10 A/ns 150 V/ns STARTUP tSTART Startup Time, VIN rising above UVLO Time until gate responds to IN CNEG = 2.2 µF, CLDO = 1 µF 2 ms DRIVER tpd,on Propagation delay, turn on IN rising to IDS > 10 mA, VDS = 100 V RDRV = 40 kΩ, VNEG = -14 V 20 ns tdelay,on Turn on delay time IDS > 1 A to VDS < 320 V, RDRV = 40 k Ω 12 ns trise Rise Time VDS = 320 V to VDS = 80 V, ID = 5 A 4.2 ns tpd,off Propagation delay, turn off IN falling to VDS > 10 V; ID = 5 A 36 ns tfall Fall Time VDS = 80 V to VDS = 320 V, ID = 5 A 15 ns FAULT tcurr Current Fault Delay IDS > ITH to FAULT low 50 ns tblank Current Fault Blanking Time 20 ns treset Fault reset time IN held low 350 µs |
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