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SN65DP149 Datasheet(PDF) 5 Page - Texas Instruments |
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SN65DP149 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 54 page  5 SN65DP149, SN75DP149 www.ti.com SLLSEL2C – SEPTEMBER 2015 – REVISED JULY 2016 Product Folder Links: SN65DP149 SN75DP149 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Pin Functions (continued) PIN I/O DESCRIPTION (1) SIGNAL NAME NO. MAIN LINK OUTPUT PINS (FAIL SAFE) OUT_D2n OUT_D2p 29 30 O TMDS data 2 differential output OUT_D1n OUT_D1p 26 27 O TMDS data 1 differential output OUT_D0n OUT_D0p 24 25 O TMDS data 0 differential output OUT_CLKn OUT_CLKp 21 22 O TMDS data clock differential output HOT PLUG DETECT PINS HPD_SRC 3 O Hot plug detect output HPD_SNK 28 I (Failsafe) Hot plug detect input DDC DATA PINS SDA_SRC SCL_SRC 39 38 I/O (Failsafe) Source side TMDS port bidirectional DDC data line SDA_SNK SCL_SNK 33 32 I/O (Failsafe) Sink side TMDS port bidirectional DDC data lines CONTROL PINS OE 36 I Operation enable/reset pin OE = L: Power-down mode OE = H: Normal operation Internal weak pullup: Resets device when transitions from H to L SLEW_CTL 34 I 3 level (1) Slew rate control when I2C_EN/PIN = Low. SLEW_CTL = H, fastest data rate (default) SLEW_CTL = L, 5-ps slow SLEW_CTL = No Connect, 10-ps slow When I2C_EN/PIN = High Slew rate is controlled through I2C[4] PRE_SEL 16 I 3 level (1) PRE_SEL = L: - 2-dB de-emphasis PRE_SEL = No Connect: 0-dB PRE_SEL = H: Reserved Note: (3 level for pin strap programming, but 2 level when I2C[4] address) EQ_SEL/A0 17 I 3 level (1) Input Receive Equalization pin strap when I2C_EN/PIN = Low EQ_SEL = L: Fixed EQ at 7.5-dB EQ_SEL = No Connect: Adaptive EQ EQ_SEL = H: Fixed at 14-dB When I2C_EN/PIN = High Address bit 1 Note: (3 level for pin strap programming but 2 level when I2C[4] address) I2C_EN/PIN 8 I I2C_EN/PIN = High; puts device into I2C control mode I2C_EN/PIN = Low; puts device into pin strap mode SCL_CTL 13 I I2C clock signal Note: When I2C_EN/PIN = Low Pin strapping take priority and those functions cannot be changed by I2C SDA_CTL 14 I/0 I2C data signal Note: When I2C_EN/PIN = Low Pin strapping take priority and those functions cannot be changed by I2C Vsadj 18 I TMDS-compliant voltage swing control nominal resistor to GND HDMI_SEL/A1 23 I HDMI_SEL when I2C_EN/PIN = Low HDMI_SEL = High: Device configured for DVI HDMI_SEL = Low: Device configured for HDMI (Adaptor ID block is readable through I2C When I2C_EN/PIN = High Address bit 2 Note: Weak internal pull down SUPPLY AND GROUND PINS VCC 11, 37 P 3.3-V power supply VDD 12, 19, 20, 31, 40 P 1.1-V power supply |
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Similar Description - SN65DP149_16 |
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