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THS1230 Datasheet(PDF) 4 Page - Texas Instruments |
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THS1230 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 23 page www.ti.com RECOMMENDED OPERATING CONDITIONS THS1230 SLAS291B – OCTOBER 2000 – REVISED MARCH 2004 over operating free-air temperature range, T A (unless otherwise noted) MIN NOM MAX UNIT POWER SUPPLY Supply voltage AVDD 3.0 3.3 3.6 V DVDD ANALOG AND REFERENCE INPUTS Reference input voltage VREFT fCLK = 5 MHz to 30 MHz 2.0 2.15 2.5 V VREFB fCLK = 5 MHz to 30 MHz 1.05 1.15 1.3 Reference voltage differential, VREFT – VREFB fCLK = 5 MHz to 30 MHz 0.95 1.0 1.05 V Analog input voltage differential, (AIN+) – (AIN–)(1) CON1 = 0, CON0 = 1 –1.0 1.0 V CON1 = 1, CON0 = 0 –2.0 2.0 Analog input capacitance, Ci 10 pF Clock input (2) 0 AVDD V DIGITAL OUTPUTS Minimum digital output load resistance, RL 100 k Ω Maximum digital output load capacitance, Ci 0 10 15 pF DIGITAL INPUTS High-level input voltage, VIH 2.4 DVDD V Low-level input voltage, VIL DGND 0.8 V Clock frequency, fCLK (3) 5 30 MHz Clock pulse duration, tw(CLKL), tw(CLKH) fCLK = 30 MHz 15 16.7 18.3 ns Operating free-air temperature, TA TH1230 0 70 °C TJ1230 –40 85 (1) Based on VREFT – VREFB = 1.0 V, varies proportional to the VREFT – VREFB value. AIN+ and AIN– inputs must always be greater than 0 V and less than AVDD. (2) Clock pin is referenced to AGND and powered by AVDD. (3) Clock frequency can be extended to this range without degradation of performance. 4 |
Similar Part No. - THS1230_15 |
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Similar Description - THS1230_15 |
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