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THS3215IRGVT Datasheet(PDF) 10 Page - Texas Instruments |
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THS3215IRGVT Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 71 page  10 THS3215 SBOS780A – MARCH 2016 – REVISED APRIL 2016 www.ti.com Product Folder Links: THS3215 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) Test levels (all values set by characterization and simulation): (A) 100% tested at TA≈ TJ≈ 25°C; over temperature limits by characterization and simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information. (2) This slew rate is the average of the rising and falling time estimated from the large-signal bandwidth as: (VPEAK / √2) × 2π × f–3dB. (3) Currents out of pin treated as a positive polarity. 7.8 Electrical Characteristics: Midscale (DC) Reference Buffer at +VCC = 6.0 V, –VCC = –6.0 V, RLOAD = 150 Ω at pin 15, and TJ ≈ 25˚C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEST LEVEL (1) AC PERFORMANCE (Output measured at pin 15) Small-signal bandwidth (SSBW) VOUT = 100 mVPP 200 MHz C Large-signal bandwidth (LSBW) VOUT = 1 VPP 50 MHz C Slew rate(2) VOUT = 4-V step 110 V/µs C Input voltage noise f > 5 kHz 4.6 nV/ √Hz C Input current noise f > 5 kHz 1.3 pA/ √Hz C AC output impedance f = 20 MHz, no load current 2.5 Ω C DC AND I/O PERFORMANCE (RS = 25 Ω, and output measured at pin 15, unless otherwise noted) Buffer gain VI = ±1 V, RLOAD = 200 Ω .9985 0.999 1.001 V/V A Buffer gain drift TJ = –40°C to +125°C –1.2 –2.2 ppm/°C B Output offset from midsupply Input floating, pin 1 open –120 30 70 mV A Output offset voltage Input driven to 0 V from 0- Ω source –1.0 4.0 15 mV A Input offset voltage drift TJ = –40°C to +125°C, input driven to 0 V 4 9 15 µV/°C B Input bias current(3) –10 ±1 10 µA A Input bias current drift TJ = –40°C to +125°C –5 ±1 5 nA/°C B Input/output headroom to either supply gain change < 1% 1.1 1.4 V A Input impedance Internal 50-k Ω divider resistors to each supply 22 || 1.5 k Ω || pF C Linear output current into resistive load ±1.62 V into 36 Ω 40 65 mA A DC output impedance Load current = ±30 mA 0.1 0.3 0.6 Ω C Positive power-supply rejection ratio (+PSRR) Referred to input with VMID_IN (pin 1) at GND 60 dB A Negative power-supply rejection ratio (—PSRR) Referred to input with VMID_IN (pin 1) at GND 69 dB A |
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