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THS4271DGNG4 Datasheet(PDF) 2 Page - Texas Instruments |
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THS4271DGNG4 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 50 page THS4271 THS4275 SLOS397F – JULY 2002 – REVISED OCTOBER 2009 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGING/ORDERING INFORMATION(1) ORDERABLE PACKAGE AND NUMBER LEADLESS PLASTIC MSOP (2) PLASTIC MSOP (2) MSOP 8 (3) PowerPAD PLASTIC SMALL OUTLINE (D) (2) PACKAGE (DRB) (DGN) PACKAGE MARKING (DGK) MARKING THS4271D THS4271DRBT THS4271DGN THS4271DGK BFQ BEY THS4271DR THS4271DRBR THS4271DGNR THS4271DGKR THS4275D THS4275DRBT THS4275DGN THS4275DGK BFR BJD THS4275DR THS4275DRBR THS4275DGNR THS4275DGKR (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) All packages are available taped and reeled. The R suffix standard quantity is 2500 (for example, THS4271DGNR). (3) All packages are available taped and reeled. The R suffix standard quantity is 3000. The T suffix standard quantity is 250 (for example, THS4271DRBT). ABSOLUTE MAXIMUM RATINGS Over operating free-air temperature range unless otherwise noted (1) UNIT VS Supply voltage 16.5 V VI Input voltage ±VS IO (2) Output current 100 mA Continuous power dissipation See Dissipation Ratings Table TJ Maximum junction temperature +150°C TJ (2) Maximum junction temperature, continuous operation long term reliability +125°C TJ (3) Maximum junction temperature to prevent oscillation +60°C Tstg Storage temperature range –65°C to +150°C HBM 3000 V ESD ratings CDM 1500 V MM 1000 V (1) The absolute maximum temperature under any condition is limited by the constraints of the silicon process. Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may result in reduced reliability and/or lifetime of the device. (3) See Maximum Die Temperature to Prevent Oscillation section in the Application Information of this data sheet. PACKAGE DISSIPATION RATINGS θJC θJA (1) PACKAGE (°C/W) (°C/W) D (8 pin) 38.3 97.5 DGN (8 pin)(2) 4.7 58.4 DGK (8 pin) 54.2 260 DRB (8 pin)(2) 5 45.8 (1) These data were taken using the JEDEC standard High-K test PCB. (2) The THS4271/5 may incorporate a PowerPAD™ on the underside of the chip. This feature acts as a heat sink and must be connected to a thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature which could permanently damage the device. See TI technical briefs SLMA002 and SLMA004 for more information about utilizing the PowerPAD thermally enhanced package. 2 Submit Documentation Feedback Copyright © 2002–2009, Texas Instruments Incorporated Product Folder Link(s): THS4271 THS4275 |
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