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THS7353PWR Datasheet(PDF) 10 Page - Texas Instruments |
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THS7353PWR Datasheet(HTML) 10 Page - Texas Instruments |
10 / 57 page CH.1-GAIN ADJ. CH.2-INPUT A CH.1-OUTPUT CH.1-INPUT A NC NC CH.2-OUTPUT CH.3-INPUT A CH.3-OUTPUT CH.2-INPUTB CH.2-GAIN ADJ. CH.1-INPUTB CH.3-GAIN ADJ. CH.3-INPUTB I2C-SCL I2C-A1 I2C-SDA I2C-A0 V S+ GND THS7353 SLOS484B – NOVEMBER 2005 – REVISED AUGUST 2012 www.ti.com PIN CONFIGURATION THS7353PW TSSOP (20-Pin) (Top View) A. NC indicates there is no internal connection to these pins. It is recommended, but not required, to connect these pins to GND. TERMINAL FUNCTIONS TERMINAL DESCRIPTION NAME NO. N/C 1, 20 No Internal Connection. It is recommended, but not required, to connect these pins to GND CH. 1 – INPUT A 2 Video Input Channel 1. Input A CH. 2 – INPUT A 3 Video Input Channel 2. Input A CH. 3 – INPUT A 4 Video Input Channel 3. Input A CH. 1 – INPUT B 5 Video Input Channel 1. Input B CH. 2 – INPUT B 6 Video Input Channel 2. Input B CH. 3 – INPUT B 7 Video Input Channel 3. Input B I2C-A1 8 I2C Slave Address Control Bit A1. Connect to Vs+ for a logic 1 preset value or GND for a logic 0 preset value. I2C-A0 9 I2C Slave Address Control Bit A0. Connect to Vs+ for a logic 1 preset value or GND for a logic 0 preset value. GND 10 Ground reference pin for all internal circuitry VS+ 11 Positive Power Supply Input Pin. Connect to 2.7 V to 5 V Serial data line of the I2C bus. Pull-up resistor should have a minimum value = 2-k Ω and a maximum value = SDA 12 19-k Ω. Pull up to Vs+ I2C bus clock line. Pull-up resistor should have a minimum value = 2-k Ω and a maximum value = 19-kΩ. Pull SCL 13 up to Vs+ Channel 3 gain adjustment pin. Short to CH. 3 – OUTPUT pin for 0-dB gain. Or add external resistors and/or CH. 3 – GAIN ADJ. 14 capacitors to analog ground for signal gain. CH. 3 – OUTPUT 15 Video output channel 3 from either CH. 3 – INPUT A or CH. 3 – INPUT B Channel 2 gain adjustment pin. Short to CH. 2 – OUTPUT pin for 0-dB gain. Or add external resistors and/or CH. 2 – GAIN ADJ. 16 capacitors to analog ground for signal gain. CH. 2 – OUTPUT 17 Video output channel 2 from either CH. 2 – INPUT A or CH. 2 – INPUT B Channel 1 gain adjustment pin. Short to CH. 1 – OUTPUT pin for 0-dB gain. Or add external resistors and/or CH. 1 – GAIN ADJ. 18 capacitors to analog ground for signal gain. CH. 1 – OUTPUT 19 Video output channel 1 from either CH. 1 – INPUT A or CH. 1 – INPUT B 10 Copyright © 2005–2012, Texas Instruments Incorporated |
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