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HV5523K7-G Datasheet(PDF) 3 Page - Supertex, Inc |
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HV5523K7-G Datasheet(HTML) 3 Page - Supertex, Inc |
3 / 6 page 3 Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com HV5523 DC Electrical Characteristics (Over operating supply voltages and temperature, unless otherwise noted) Sym Parameter Min Typ Max Units Conditions I DD V DD supply current - - 25 mA f CLK = 16MHz, fDATA = 8.0MHz I DDQ Quiescent V DD supply current - - 100 µA D IN = 0V, all input logic pins = 0V, all outputs off I O(OFF) Off state output current - - 10 µA All outputs high, all switches parallel I IH High-level logic input current - - 1.0 µA V IH = VDD I IL Low-level logic input current - - -1.0 µA V IL = 0V V OH High level output V DD -1.0V - - V ID OUT = -10mA V OL Low level output HV OUT - - 15 V IHV OUT = +100mA DATA OUT - - 1.0 V ID OUT = +10mA V OC HV OUT clamp voltage - - -1.5 V I OL = -100mA AC Electrical Characteristics (V DD = 5.0V, Tj = 25 O C) Sym Parameter Min Typ Max Units Conditions f CLK Clock frequency - - 16 MHz --- t W Clock high / low pulse width 31 - - ns --- t SU Data setup time before clock falls 25 - - ns --- t H Data hold time after clock falls 10 - - ns --- t ON Turn on time, HV OUT from Enable - - 400 ns R L = 2.0kΩ to VPP max t DHL Delay time clock to data high to low - - 35 ns C L = 15pF t DLH Delay time clock to data low to high - - 35 ns C L = 15pF t DLE Delay time clock to LE low to high 20 - - ns --- t WLE Width of LE pulse 20 - - ns --- t SLE LE set-up time before clock falls 20 - - ns --- C IN Digital logic input capacitance - - 15 pF --- Input and Output Equivalent Circuits VDD DATA INPUT HV OUT Logic Inputs DATA OUTPUT Logic Data Output High Voltage Outputs VDD VSS VSS VSS |
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