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HV430 Datasheet(PDF) 1 Page - Supertex, Inc

Part # HV430
Description  High-Voltage Ring Generator
Download  9 Pages
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Manufacturer  SUTEX [Supertex, Inc]
Direct Link  http://www.supertex.com
Logo SUTEX - Supertex, Inc

HV430 Datasheet(HTML) 1 Page - Supertex, Inc

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Supertex inc.
HV430
Supertex inc.
www.supertex.com
Doc.# DSFP-HV430
A031414
Features
105Vrms ring signal
Output overcurrent protection
5.0V CMOS logic control
Logic enable/disable to save power
Adjustable deadband in single-control mode
Power-on reset
Fault output for problem detection
Applications
Line access cards
Set-top/Street box
General Description
The Supertex HV430 is a high voltage PWM ring generator
integrated circuit. The high voltage outputs, V
PGATE and
V
NGATE, are used to drive the gates of external high voltage
N-channel and P-channel MOSFETs in a push-pull
configuration. Overcurrent protection is implemented for
both the P-channel and N-channel MOSFETs. External
sense resistors set the over-current trip point.
High-Voltage Ring Generator
The RESET input functions as a power-on reset when
connected to an external capacitor. The FAULT output
indicates an overcurrent condition and is cleared after 4
consecutive cycles with no overcurrent condition. A logic low
on RESET or ENABLE clears the FAULT output. It is active-
low and open-drain to allow wire OR’ing of multiple drivers.
P
GATE and NGATE are controlled independently by logic inputs
P
IN and NIN when the MODE pin is at logic high. A logic high on
P
IN will turn on the external P-channel MOSFET. Similarly, a
logic high on N
IN will turn on the external N-channel MOSFET.
Lockout circuitry prevents the N and P switches from turning
on simultaneously. A pulse width limiter restricts pulse widths
to no less than 100 - 200ns.
For applications where a single control input is desired, the
MODE pin should be connected to SGND. The PWM control
signal is then input to the N
IN pin. A user-adjustable deadband
in the control logic ensures break-before-make on the outputs,
thus avoiding cross conduction on the high voltage output
during switching. A logic high on N
IN will turn the external P-
Channel MOSFET on and the N-Channel off, and vice versa.
The IC can be powered down by applying a logic low on the
ENABLE pin, placing both external MOSFETs in the off state.
Functional Block Diagram
Ringer
Output
R
SENSE
R
SENSE
V
DD
Down
Translator
N
Driver
FAULT
PIN
NIN
RESET
De-glitcher
DEADBAND
ENABLE
MODE
V
DD
Control
Logic
V
NN1
V
PP1
SIG
GND
V
DD
Current
Trip
PWR
GND
+5.0V
VPP1
VPP2
VPSEN
VPGATE
VNN1
VNN2
VNSEN
VNGATE
10µA
reset
clk
V
NN2
Regulator
Up
Translator
P
Driver
Up
Translator
Down
Translator
Current
Trip
V
PP2
Regulator


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