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HV310 Datasheet(PDF) 6 Page - Supertex, Inc |
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HV310 Datasheet(HTML) 6 Page - Supertex, Inc |
6 / 7 page 6 HV310 ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com From the second equation for an over voltage set point of 65V, the value of R3 may be calculated. OV OFF = 1.26 = 65 • R3 / 500kΩ R3 = (1.26 • 500K) / 65 = 9.69 kΩ The closest 1% value is 9.76kΩ. From the first equation for an under voltage set point of 35V, the value R2 can be calculated. UV OFF = 1.16 = 35 • (R2 + R3) / 500K R2 = (1.16 • 500K) / 35 – 9.76kΩ = 6.81kΩ. The closest 1% value is 6.81kΩ. Then R1 = 500K – (R2 + R3) = 483kΩ The closest 1% value is 487kΩ. Undervoltage/Overvoltage Operation Current Limit The current limit magnitude above which the current will not be allowed to rise during startup is programmed using a sense resistor connected from the SENSE pin to VEE pin. For example to program a current limit of 1.0A, one would choose a resistor as follows: R SENSE = 50mV / ISENSE R SENSE = 50mV / 1.0A R SENSE = 50mΩ GND VIN Pass Transistor OFF ON UVOFF UVON OVOFF OVON Pin # Function Description 1 PWRGD Ths pin is held in Hi-Z state on initial power application and pulls low when the external MOSFET is fully turned on. This pin may be used as an enable control when connected directly to a PWM power module. 2 OV This pin, when raised above its high threshold, will immediately cause the GATE pin to be pulled low. The GATE pin will remain low until the voltage on this pin falls below the low threshold limit, initiating a new start-up cycle. 3 UV This Under Voltage sense pin, when below its low threshold limit will ensure that the GATE pin is low. The GATE pin will remain low until the voltage on this pin rises above the high threshold, initializing a new start-up cycle. 4 VEE This pin is the negative voltage power supply input to the circuit. 5 VDD This pin is the positive voltage power supply input to the circuit. 6 RAMP This pin provides a current output so that a timing ramp voltage is generated when a capacitor is connected. The initial portion of the ramp provides a time delay, which in conjunction with the Un- der Voltage detection circuit eliminates circuit card insertion contact bounce. The RAMP pin also controls the delay between the current limit mode disengaging and the PWRGD signal activating; as well as the current rise profile after the initial turn on delay. 7 GATE This is the GATE driver output for the external N-Channel MOSFET. 8 SENSE The current sense resistor connected from this pin to VEE pin programs the current limit. Constant current output mode is established when the voltage drop across this resistor reaches 50mV. Pin Description |
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