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SN65MLVD202D Datasheet(PDF) 7 Page - Texas Instruments

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Part # SN65MLVD202D
Description  MULTIPOINT-LVDS LINE DRIVERS AND RECEIVERS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SN65MLVD202D Datasheet(HTML) 7 Page - Texas Instruments

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SN65MLVD200, SN65MLVD202
SN65MLVD204, SN65MLVD205
MULTIPOINT–LVDS LINE DRIVERS AND RECEIVERS
SLLS463E – SEPTEMBER 2001 – REVISED JUNE 2003
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
driver switching characteristics over recommended operating conditions (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
MIN
TYP†
MAX
UNIT
tPLH
Propagation delay time, low-to-high-level output
1.6
2.3
4.1
ns
tPHL
Propagation delay time, high-to-low-level output
1.6
2.3
4.1
ns
tr
Differential output signal rise time
See Figure 5
1.5
2
3
ns
tf
Differential output signal fall time
See Figure 5
1.5
2
3
ns
tsk(p)
Pulse skew (|tPHL –- tPLH|)
30
ps
tsk(pp)
Part-to-part skew (see Note 4)
900
ps
tPZH
Propagation delay time, high-impedance-to-high-level output
1.5
3.7
6.5
ns
tPZL
Propagation delay time, high-impedance-to-low-level output
See Figure 6
1.5
3.7
6.5
ns
tPHZ
Propagation delay time, high-level-to-high-impedance output
See Figure 6
1.3
3.5
6.8
ns
tPLZ
Propagation delay time, low-level-to-high-impedance output
1.8
3.5
6.1
ns
tjit(per)
Period jitter, rms (1 standard deviation) (see Notes 5 and 6)
50-MHz clock input
(see Figure 8)
23
ps
tjit(cc)
Cycle-to-cycle jitter, peak (see Notes 5 and 6)
50-MHz clock input
(see Figure 8)
180
ps
tjit(pp)
Peak-to-peak jitter, (see Notes 5, 7, and 8)
100 Mbps 215–1 PRBS
input (see Figure 8)
210
ps
† All typical values are at 25
°C and with a 3.3-V supply voltage.
NOTES:
4. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both
devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
5. Jitter parameters are based on design and characterization. Stimulus system jitter of 11 ps tjit(per), 43 ps tjit(cc), or 54 ps tjit(pp) have
been subtracted from the values.
6. Input voltage = 0 V to VCC, tr = tf ≤ 1 ns (20% to 80%), measured over 30k samples.
7. Input voltage = 0 V to VCC, tr = tf ≤ 1 ns (20% to 80%), measured over 100k samples.
8. Peak-to-peak jitter includes jitter due to pulse skew (tsk(p)).


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