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TLK105 Datasheet(PDF) 3 Page - Texas Instruments |
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TLK105 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 104 page  3 TLK105 TLK106 www.ti.com SLLSEB8C – AUGUST 2012 – REVISED APRIL 2016 Submit Documentation Feedback Product Folder Links: TLK105 TLK106 Table of Contents Copyright © 2012–2016, Texas Instruments Incorporated 1.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Table of Contents 1 Introduction ............................................... 1 1.1 Features .............................................. 1 1.2 Applications ........................................... 1 1.3 Device Overview ..................................... 1 1.4 Electrostatic Discharge Caution ...................... 3 2 Pin Descriptions ......................................... 4 2.1 Pin Layout ............................................ 4 2.2 Serial Management Interface (SMI) .................. 5 2.3 MAC Data Interface .................................. 5 2.4 10Mbs and 100Mbs PMD Interface .................. 6 2.5 Clock Interface ....................................... 6 2.6 LED Interface ......................................... 6 2.7 Reset and Power Down .............................. 6 2.8 Power and Bias Connections ......................... 7 3 Hardware Configuration ................................ 7 3.1 Bootstrap Configuration .............................. 7 3.2 Power Supply Configuration .......................... 8 3.3 IO Pins Hi-Z State During Reset .................... 10 3.4 Auto-Negotiation .................................... 10 3.5 Auto-MDIX ........................................... 10 3.6 MII Isolate Mode .................................... 11 3.7 PHY Address ........................................ 11 3.8 LED Interface ....................................... 12 3.9 Loopback Functionality .............................. 13 3.10 BIST ................................................. 15 3.11 Cable Diagnostics ................................... 15 4 Interfaces ................................................ 17 4.1 Media Independent Interface (MII) .................. 17 4.2 Reduced Media Independent Interface (RMII) ...... 18 4.3 Serial Management Interface ....................... 20 5 Architecture ............................................. 24 5.1 100Base-TX Transmit Path ......................... 24 5.2 100Base-TX Receive Path ......................... 27 5.3 10Base-T Receive Path ............................. 29 5.4 Auto Negotiation ..................................... 30 5.5 Link Down Functionality ............................. 32 6 Reset and Power Down Operation .................. 33 6.1 Hardware Reset ..................................... 33 6.2 Software Reset ...................................... 33 6.3 Power Down/Interrupt ............................... 33 6.4 Power Save Modes ................................. 34 7 Design Guidelines ...................................... 35 7.1 TPI Network Circuit ................................. 35 7.2 Clock In (XI) Requirements ......................... 35 7.3 Thermal Vias Recommendation .................... 37 8 Register Block .......................................... 38 8.1 Register Definition ................................... 43 8.2 Cable Diagnostic Control Register (CDCR) ......... 67 8.3 PHY Reset Control Register (PHYRCR) ............ 68 8.4 Compliance Test register (COMPTR) ............... 69 8.5 TX_CLK Phase Shift Register (TXCPSR) .......... 69 8.6 Power Back Off Control Register (PWRBOCR) .... 70 8.7 Voltage Regulator Control Register (VRCR) ........ 70 8.8 Cable Diagnostic Configuration/Result Registers ... 70 9 Electrical Specifications .............................. 76 9.1 Absolute Maximum Ratings ........................ 76 9.2 ESD Ratings ........................................ 76 9.3 Recommended Operating Conditions .............. 76 9.5 TLK105 32-Pin Industrial Device (85°C) Thermal Characteristics ....................................... 77 9.6 TLK106 32-Pin Extended Temperature (105°C) Device Thermal Characteristics ..................... 77 9.7 DC Characteristics, VDD_IO ....................... 78 9.8 DC Characteristics ................................. 78 9.9 Power Supply Characteristics ....................... 79 9.10 AC Specifications .................................... 80 10 Revision History ........................................ 96 |
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