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7534 Datasheet(PDF) 3 Page - Fairchild Semiconductor

Part # 7534
Description  A New PSPICE Electro-Thermal Subcircuit
Download  16 Pages
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

7534 Datasheet(HTML) 3 Page - Fairchild Semiconductor

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3
Rev. A, July 2004
©2004 Fairchild Semiconductor Corporation
Figure 1. Self-heating MOSFET macro-model independent of global temperature definition
Parametric data for several temperature points are used for model calibration result-
ing in a macro-model which provides representative simulation data for any rated
operating junction temperature.
Temperature dependent model parameters respond in closed loop form to the junc-
tion temperature information provided by node Tj. Performance is independent of
SPICE’s global temperature definition listed as .TEMP and temperature option
TNOM, circumventing the level-NMOS model primitive temperature limitation. All
MOSFET operating losses are inclusive in the current source G_Pdiss representing
instantaneous power dissipation to the thermal model.
Multiple MOSFETs may be simulated at different and variable junction temperatures.
Each MOSFET may be connected to a heat sink model via note Tcase. The heat sink
model may be device specific, so heat sink optimization becomes possible. Current
source G_Pdiss is referenced to the simulation ground reference, permitting use of
the model in bridge topologies.
An example of a symbol representation of the self-heating MOSFET model is shown
in Figure 2. Symbol files for OrCAD’s two circuit entry tools "PSPICE Schematic" and
"OrCAD Capture" may be downloaded from wwww.fairchildsemi.com. Recom-
mended symbol implementation is to designate the pinout attribute for Tj as optional
(ERC = DON’T CARE, Float=UniqueNet). Tj is the representation of the device jun-
tion temperature. It may be used as a monitoring point, or it may be connected to a
defined voltage source to override the self-heating feature. Tcase must be connected
to a heat sink model. Treatment of connections to the model’s gate, drain, and sour-
rce terminals are no different than those of the standard MOSFET model.
+
-
DRAIN
2
LDRAIN
RLDRAIN
DBREAK
DBODY
DPLCAP
5
10
5
51
+
-
+
-
+
-
6
8
6
8
5
8
51
RSLC2
ESG
ESLC
G_RDRAIN
EBREAK
MWEAK
MMED
MSTRO
CIN
G_RSOURCE
LSOURCE
RLSOURCE
SOURCE
3
EVTEMP
RGATE
LGATE
RLGATE
GATE
1
CA
CB
S1A
S2A
S1B
S2B
EGS
EDS
11
50
16
21
6
20
9
87
14
15
13
8
14
13
13
12
EVTHRES
G_RSLC1
CTHERM1
RTHERM1
CTHERM6
RTHERM6
CTHERM5
RTHERM5
CTHERM2
RTHERM2
CTHERM3
RTHERM3
CTHERM4
RTHERM4
G_PDISS
0
Tj
Tcase
106
105
104
103
102
32
31
-
+
EDBODY
30
G_RDBODY
G_RDBREAK
RDBODY


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