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Peripheral EPP Application

The EPP advanced mode connection scheme and signals

are shown in Figure 3. The recommended

1284-C con-

nector is shown at the peripheral in this application. Figure

6 depicts the connection diagram for this application and

indicates the commonly used 1284-A connector at the host

PC. See Figure 7 for viewing connections for the IEEE rec-

ommended 1284-C connector. This is a connection dia-

gram for both the host and peripheral sides.

It should be noted that there is no IEEE 1284 signal desig-

nated for driving the direction pin on 1284-compliant trans-

ceivers. The direction signal for bidirectional data flow

control is generally programmed and driven from a circuit

block referred to as the controller. The peripheral controller

function is customarily implemented through use of a

microprocessor or an ASIC (application specific integrated

circuit) on the peripheral. On the host-side, the controller is

usually a single chip multi-functional device that may incor-

porate UARTs, disk and keyboard, and 1284 interface con-

troller

functions.

One

such

device

is

National

Semiconductor’s Super I/O Sidewinder PC87323VF.

FIGURE 3. Peripheral Side Application — Extended Parallel Port Signals