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P89LPC902FD Datasheet(PDF) 2 Page - NXP Semiconductors |
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P89LPC902FD Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 55 page Philips Semiconductors P89LPC901/902/903 8-bit microcontrollers with two-clock 80C51 core Product data Rev. 04 — 21 November 2003 2 of 55 9397 750 12293 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. s Serial Flash In-Circuit Programming (ICP) allows simple production coding with commercial EPROM programmers. Flash security bits prevent reading of sensitive application programs. s Watchdog timer with separate on-chip oscillator, requiring no external components. The watchdog prescaler is selectable from 8 values. s Low voltage reset (Brownout detect) allows a graceful system shutdown when power fails. May optionally be configured as an interrupt. s Idle and two different Power-down reduced power modes. Improved wake-up from Power-down mode (a low interrupt input starts execution). Typical Power-down current is 1 µA (total Power-down with voltage comparators disabled). s Active-LOW reset. On-chip power-on reset allows operation without external reset components. A reset counter and reset glitch suppression circuitry prevent spurious and incomplete resets. A software reset function is also available. s Configurable on-chip oscillator with frequency range options selected by user programmed Flash configuration bits. Oscillator options support frequencies from 20 kHz to the maximum operating frequency of 12 MHz (P89LPC901). s Watchdog timer with separate on-chip oscillator, requiring no external components. The watchdog prescaler is selectable from 8 values. s Programmable port output configuration options: quasi-bidirectional, open drain, push-pull, input-only. s Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of the pins match or do not match a programmable pattern. s LED drive capability (20 mA) on all port pins. A maximum limit is specified for the entire chip. s Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns minimum ramp times. s Only power and ground connections are required to operate the P89LPC901/902/903 when internal reset option is selected. s Four interrupt priority levels. s Two (P89LPC901), three (P89LPC903), or five (P89LPC902) keypad interrupt inputs. s Second data pointer. s Schmitt trigger port inputs. s Emulation support. |
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