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TLV320AIC3110IRHBT Datasheet(PDF) 3 Page - Texas Instruments |
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TLV320AIC3110IRHBT Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 132 page  3 TLV320AIC3110 www.ti.com SLAS647C – DECEMBER 2009 – REVISED MAY 2016 Submit Documentation Feedback Product Folder Links: TLV320AIC3110 Revision History Copyright © 2009–2016, Texas Instruments Incorporated Table of Contents 1 Device Overview ......................................... 1 1.1 Features .............................................. 1 1.2 Applications ........................................... 1 1.3 Description ............................................ 1 1.4 Functional Block Diagram ............................ 2 2 Revision History ......................................... 3 3 Device Comparison ..................................... 5 4 Pin Configuration and Functions ..................... 6 4.1 Pin Attributes ......................................... 6 5 Specifications ............................................ 8 5.1 Absolute Maximum Ratings .......................... 8 5.2 ESD Ratings .......................................... 8 5.3 Recommended Operating Conditions ................ 8 5.4 Thermal Information .................................. 9 5.5 Electrical Characteristics ............................. 9 5.6 Power Dissipation Ratings .......................... 10 5.7 I2S, LJF, and RJF Timing in Master Mode .......... 11 5.8 I2S, LJF, and RJF Timing in Slave Mode ........... 11 5.9 DSP Timing in Master Mode ........................ 11 5.10 DSP Timing in Slave Mode ......................... 11 5.11 I2C Interface Timing ................................. 12 5.12 Typical Characteristics .............................. 15 6 Parameter Measurement Information .............. 18 7 Detailed Description ................................... 19 7.1 Overview ............................................ 19 7.2 Functional Block Diagram ........................... 20 7.3 Feature Description ................................. 20 7.4 Register Map ........................................ 80 8 Application and Implementation ................... 120 8.1 Application Information ............................ 120 8.2 Typical Application ................................. 120 9 Power Supply Recommendations ................. 123 10 Layout ................................................... 124 10.1 Layout Guidelines .................................. 124 10.2 Layout Example .................................... 124 11 Device and Documentation Support .............. 125 11.1 Community Resources ............................. 125 11.2 Trademarks ........................................ 125 11.3 Electrostatic Discharge Caution ................... 125 11.4 Glossary ............................................ 125 12 Mechanical Packaging and Orderable Information ............................................. 125 12.1 Packaging Information ............................. 125 2 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (May 2012) to Revision C Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. .......................................... 1 • Added Power-Supply Sequence section to the Device Initialization section ................................................ 20 • Added the reference to the PGA Gain Versus Input Impedance table in the MICBIAS and Microphone Preamplifier section ................................................................................................................. 27 • Changed units in Table 7-15 from k to k Ω ....................................................................................... 27 • Changed SDIN terminal to DIN in Figure 7-16 .................................................................................. 40 • Changed Section 7.3.10.1.2 diagrams for PRB_P2/5/8/10/13/15/18/21/24/25 to reflect that the DRC_HPF filter cannot be bypassed when the DRC is turned off .............................................................................. 43 • Added sequence for inserting a beep in the middle of an already-playing signal and note text following script in the Key-Click Functionality With Digital Sine-Wave Generator (PRB_P25) section ........................................ 59 • Added note to Register Map section .............................................................................................. 80 • Changed DOSR note in Page 0 / Register 14 by switching multiple value for Filter Type A and Filter Type C ........ 83 • Added ADC OSR note to Page 0 / Register 20 ................................................................................. 84 • Changed values in Page 0 / Register 69 (0x45): DRC Control 2 ............................................................. 95 • Changed Page 0, Register 70, bit D3-D0 decay rate value for 0000 from DR = 1.5625e –3 to DR = 0.015625 ........ 95 • Switched D1 and D0 descriptions so that D1 is for SP and D0 is for HP in Page 1 / Register 30 table ............... 103 • Changed Page 1 / Register 40, D1 to reserved ............................................................................... 106 • Changed Page 1 / Register 41, D1 to reserved ............................................................................... 106 |
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