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UCC3913DG4 Datasheet(PDF) 7 Page - Texas Instruments |
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UCC3913DG4 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 21 page UCC2913 UCC3913 SLUS274A – JANUARY 1999 – REVISED APRIL 2003 7 www.ti.com APPLICATION INFORMATION During a fault, CT charges at a rate determined by the internal charging current and the external timing capacitor. Once CT charges to 2.5 V, the fault comparator switches and sets the fault latch. Setting of the fault latch causes both the output to switch off and the charging switch to open. CT must now discharge with the 1-µA current source, I2, until 0.5 V is reached. Once the voltage at CT reaches 0.5 V, the fault latch resets, which re-enables the output and allows the fault circuitry to regain control of the charging switch. If a fault is still present, the fault comparator closes the charging switch causing the cycle to begin. Under a constant fault, the duty cycle is given by: Duty Cycle + 1 mA I PL ) 36 mA Average power dissipation in the pass element is given by: P FET(avg) + VFET IMAX 1 mA I PL ) 36 mA Where VFET >> 5 V IPL can be approximated as : I PL ^ V FET R PL and where IPL >> 36 µA, the duty cycle can be approximated as : Duty Cycle + 1 mA R PL V FET Therefore, the maximum average power dissipation in the MOSFET can be approximated by: P FET(avg) + VFET IMAX 1 mA R PL V FET + IMAX 1 mA R PL Notice that in the approximation, VFET cancels. therefore, average power dissipation is limited in the N-channel MOSFET pass element. Overload Comparator The linear amplifier in the UCCx913 ensures that the output N-channel MOSFET does not pass more than IMAX (which is VIMAX/RS). In the event the output current exceeds the programmed IMAX by 0.2 V/RS (which can only occur if the output MOSFET is not responding to a command from the device) the CT pin begins charging with I3, 1 mA, and continue to charge to approximately 8 V. This allows a constant fault to show up on the SD/FLT pin, and also since the voltage on CT charges past 2.5 V only in an overload fault mode, it can be used for detection of output FET failure or to build in redundancy in the system. (6) (7) (8) (9) (10) |
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