UCC5628

SLUS302C − DECEMBER 1994 − REVISED MARCH 2004

6

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APPLICATION INFORMATION

UDG−98100

REG

TRMPWR

GND

TRMPWR

DIFF B

REG

DIFF B

TRMPWR

TERMPWR

3

25

35

10

34

35

34

10

3

GND 25

DIFFSENSE

DIFFSENSE

REG

TRMPWR

GND

DIFF B

3

25

10

34

DATA LINES (15)

TRMPWR

REG

DIFF B

34

10

DATA LINES (15)

3

GND 25

SCSI CONTROLLER

DIFFSENS

CONTROL LINES

L1+

L1−

L9+

L9−

L1+

L1−

L9+

L9−

4 BITS OF THE HIGH BYTE

L10+

L10−

L13+

L13−

L10+

L10−

L13+

L13−

L1+

L1−

L9+

L9−

L1+

L1−

L9+

L9−

LOW BYTE 8 BITS

L10+

L10−

L14+

L14−

L10+

L10−

L14+

L14−

HIGH BYTE 4 BITS

PLUS PARITY

36

DISCNCT

36

DISCNCT

36 DISCNCT

36 DISCNCT

4.7

µF

4.7

µF

4.7

µF

4.7

µF

4.7

µF

4.7

µF

0.1

µF

0.1

µF

50 k

Ω

50 k

Ω

220 k

Ω

PLUS PARITY

9 BITS

NOTE: A 220-k

Ω resistor is added to ground to insure the transceivers will come up in single-ended mode when no terminator is enabled. The

controller DIFFSENS ties to the DIFFB pin on the terminators, only one RC network should be on a device.

NOTE: * For SPI−2 systems a 20-k

Ω resistor and 0.1-µF capacitor is used. For SPI−3 and SPI−4 systems a 50-kΩ resistor and 4.7-µF capacitor

is used.